Inventor
KROLAK DAVID J
US24 patents
⚠️ This page may combine multiple inventors who share the name “KROLAK DAVID J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
21 patentsUS4888773ADec 19, 1989
Smart memory card architecture and interface
IBM198 citations94
US7500035B2Mar 3, 2009
Livelock resolution method
IBM16 citations91
US10216653B2Feb 26, 2019
Pre-transmission data reordering for a serial interface
IBM5 citations73
US11580058B1Feb 14, 2023
Hierarchical ring-based interconnection network for symmetric multiprocessors
IBM2 citations71
US9626229B1Apr 18, 2017
Processor performance monitoring unit synchronization
IBM4 citations69
US12095891B2Sep 17, 2024
Communication systems for power supply noise reduction
IBM0 citations62
US10606777B2Mar 31, 2020
Dropped command truncation for efficient queue utilization in multiprocessor data processing system
IBM1 citations62
US9495312B2Nov 15, 2016
Determining command rate based on dropped commands
IBM2 citations62
US9495314B2Nov 15, 2016
Determining command rate based on dropped commands
IBM2 citations62
US12099463B2Sep 24, 2024
Hierarchical ring-based interconnection network for symmetric multiprocessors
IBM0 citations61
US10664398B2May 26, 2020
Link-level cyclic redundancy check replay for non-blocking coherence flow
IBM0 citations52
US9575921B2Feb 21, 2017
Command rate configuration in data processing system
IBM0 citations52
US9251111B2Feb 2, 2016
Command rate configuration in data processing system
IBM1 citations52
US12176960B2Dec 24, 2024
Communication systems for power supply noise reduction
IBM0 citations51
US10969822B2Apr 6, 2021
Reducing time of day latency variation in a multi processor system
IBM0 citations51
US10693595B2Jun 23, 2020
ACK clock compensation for high-speed serial communication interfaces
IBM0 citations51
US10128985B2Nov 13, 2018
ACK clock compensation for high-speed serial communication interfaces
IBM0 citations51
US7861022B2Dec 28, 2010
Livelock resolution
IBM0 citations51
US7797600B2Sep 14, 2010
Method and apparatus for testing a ring of non-scan latches with logic built-in self-test
IBM1 citations51
US10613980B2Apr 7, 2020
Coherence protocol providing speculative coherence response to directory probe
IBM0 citations42
US10324491B2Jun 18, 2019
Reducing time of day latency variation in a multi-processor system
IBM0 citations41