Inventor

SHERIDAN DAVID C

US29 patents

⚠️ This page may combine multiple inventors who share the name “SHERIDAN DAVID C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHERIDAN DAVID C

IBM

Varactors for CMOS and BiCMOS technologies

Structure and method of hyper-abrupt junction varactors

Varactors for CMOS and BiCMOS technologies

Deep trench based far subcollector reachthrough

High performance integrated vertical transistors and method of making the same

Structure and method for hyper-abrupt junction varactors

Design structure with a deep sub-collector, a reach-through structure and trench isolation

Method for forming hyper-abrupt junction varactors

Silicon germanium heterostructure barrier varactor

Varactors for CMOS and BiCMOS technologies

Varied impurity profile region formation for varying breakdown voltage of devices

Lateral passive device having dual annular electrodes

Buried subcollector for high frequency passive semiconductor devices

Varied impurity profile region formation for varying breakdown voltage of devices

SHERIDAN DAVID C

Vertical junction field effect transistors having sloped sidewalls and methods of making

Vertical junction field effect transistors having sloped sidewalls and methods of making

Methods of making semiconductor devices having implanted sidewalls and devices made thereby

Vertical junction field effect transistors having sloped sidewalls and methods of making

SEMISOUTH LAB INC

Semiconductor devices with non-punch-through semiconductor channels having enhanced conduction and methods of making

Semiconductor devices with non-punch-through semiconductor channels having enhanced conduction and methods of making

COOLBAUGH DOUGLAS D

Silicided trench contact to buried conductive layer

Silicided trench contact to buried conductive layer

UNIV AUBURN

Graded junction termination extensions for electronic devices

Graded junction termination extensions for electronic devices

COLLINS DAVID S

Lateral passive device having dual annular electrodes

ORNER BRADLEY A

Deep trench based far subcollector reachthrough

DAHLSTROM ERIK M

Silicon germanium heterostructure barrier varactor

SANKIN IGOR

Semiconductor devices with non-punch-through semiconductor channels having enhanced conduction and methods of making

RITENOUR ANDREW

Self-aligned semiconductor devices with reduced gate-source leakage under reverse bias and methods of making