Inventor

DIESTELHORST STEPHAN

GB61 patents

⚠️ This page may combine multiple inventors who share the name “DIESTELHORST STEPHAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DIESTELHORST STEPHAN

ADVANCED RISC MACH LTD

Robust transactional memory

Range-based memory system

Data processing apparatus, and a method of handling address translation within a data processing apparatus

Controlling persistent writes to non-volatile memory based on persist buffer data and a persist barrier within a sequence of program instructions

Transactional compare-and-discard instruction

Method and apparatus for implementing lock-free data structures

Debugging data processing transactions

Performing maintenance operations

Instruction ordering

Method and apparatus for maintaining data coherence in a non-uniform compute device

Memory controller with non-volatile buffer for persistent memory operations

TAGE branch predictor with perceptron predictor as fallback predictor

I/O driven data transfer in a data processing network

Apparatus and method to generate trace data in response to transactional execution

Multiple heterogeneous energy stores

Exception handling in transactions

Saving and restoring branch prediction state

Apparatus and method of handling caching of persistent data

Method and apparatus for scheduling in a non-uniform compute device

Instruction ordering

Cache sector usage prediction

Page table structure

Transaction nesting depth testing instruction

Permitting unaborted processing of transaction after exception mask update instruction

Checking lock variables for transactions in a system with transactional memory support

Apparatus with shared transactional processing resource, and data processing method

Instruction sampling within transactions

Cache control in presence of speculative read operations

Initialisation of a storage device

Apparatus and method

Apparatus and methods to prolong lifetime of memories

Monitoring utilization of transactional processing resource

ADVANCED MICRO DEVICES INC

Preventing unintended loss of transactional data in hardware transactional memory systems

Address mapping in virtualized processing system

Processor support for hardware transactional memory

Concurrently executing critical sections in program code in a processor

Preventing unintended loss of transactional data in hardware transactional memory systems

Nested speculative regions for a synchronization facility

CHUNG JAEWOONG

Automatic suspend atomic hardware transactional memory in response to detecting an implicit suspend condition and resume thereof

Multi-level buffering of transactional data

Compiler support technique for hardware transactional memory systems

Processor support for hardware transactional memory

HOHMUTH MICHAEL P

Processor with support for nested speculative sections with different transactional modes

Extended page size using aggregated small pages

CHRISTIE DAVID S

Coexistence of advanced hardware synchronization and global locks

Virtualizable advanced synchronization facility

POHLACK MARTIN T

Protecting large regions without operating-system support

Protecting large objects within an advanced synchronization facility

DIESTELHORST STEPHAN

Transactional memory conflict management

XILINX INC

Coarse grained reconfigurable architecture