Inventor
BAMDHAMRAVURI RAM SAI MANOJ
US8 patents
Patents
8 patentsUS11487672B1Nov 1, 2022
Multiple copy scoping bits for cache memory
IBM7 citations82
US12288075B1Apr 29, 2025
Instruction execution scheduling using a hit/miss predictor
IBM3 citations71
US10540251B2Jan 21, 2020
Accuracy sensitive performance counters
IBM2 citations71
US12487935B1Dec 2, 2025
Detecting and mitigating false structure sharing within a cache line
IBM0 citations61
US11947418B2Apr 2, 2024
Remote access array
IBM1 citations60
US10884890B2Jan 5, 2021
Accuracy sensitive performance counters
IBM0 citations60
US12487825B2Dec 2, 2025
Controlling speculative actions based on a hit/miss predictor
IBM0 citations59
US11620231B2Apr 4, 2023
Lateral persistence directory states
IBM0 citations50