Inventor

MATHUR SHIV HARIT

IN25 patents

⚠️ This page may combine multiple inventors who share the name “MATHUR SHIV HARIT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MATHUR SHIV HARIT

SANDISK TECHNOLOGIES LLC

Multi-level signaling scheme for memory interface

Dual voltage range CMOS receiver

Auto-corrected IO driver architecture

Skeleton I/O generation for early ESD analysis

System and method for a reconfigurable controller bridge chip

High-level output voltage training for non-volatile memory

Reference independent and noise insensitive glitch free clock multiplexer

High speed toggle mode transmitter with capacitive boosting

Circuits for optimizing skew and duty cycle distortion between two signals

Loop delay optimization for multi-voltage self-synchronous systems

Two-stage high speed level shifter

PPA improvement for voltage mode driver and on-die termination (ODT)

SANDISK TECHNOLOGIES INC

Method and apparatus to tune a toggle mode interface

ESD centric low-cost IO layout design topology

Low power and area optimized TM4 and TM5 compliant combination TMIO transmitter architecture

Dual reference ZQ calibration circuits and methods

Loop delay optimization for multi-voltage self-synchronous systems

Wide supply range high speed low-to-high level shifter

Failsafe memory card architecture using voltage driver output enable signals

WESTERN DIGITAL TECH INC

Snapback electrostatic discharge protection for electronic circuits

On-die impedance calibration

Electrostatic discharge protection circuit

Snapback electrostatic discharge protection for electronic circuits

System and method for valid window maximization in toggle mode link using systematic skew addition to compensate for SSO and crosstalk

MATHUR SHIV HARIT

Automatic clock-activity based chip/IO ring design—a novel architecture to reduce standby consumption