Inventor
DEUTSCH SERGEJ
US54 patents
⚠️ This page may combine multiple inventors who share the name “DEUTSCH SERGEJ”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
42 patentsUS10585809B2Mar 10, 2020
Convolutional memory integrity
INTEL CORP28 citations94
US9990249B2Jun 5, 2018
Memory integrity with error detection and correction
INTEL CORP41 citations94
US12050701B2Jul 30, 2024
Cryptographic isolation of memory compartments in a computing environment
INTEL CORP3 citations86
US11580234B2Feb 14, 2023
Implicit integrity for cryptographic computing
INTEL CORP6 citations86
US10769272B2Sep 8, 2020
Technology to protect virtual machines from malicious virtual machine managers
INTEL CORP14 citations86
US10387305B2Aug 20, 2019
Techniques for compression memory coloring
INTEL CORP18 citations85
US11354423B2Jun 7, 2022
Cryptographic isolation of memory compartments in a computing environment
INTEL CORP5 citations84
US11321469B2May 3, 2022
Microprocessor pipeline circuitry to support cryptographic computing
INTEL CORP5 citations84
US11308225B2Apr 19, 2022
Management of keys for use in cryptographic computing
INTEL CORP5 citations84
US11010310B2May 18, 2021
Convolutional memory integrity
INTEL CORP7 citations84
US11784786B2Oct 10, 2023
Mitigating security vulnerabilities with memory allocation markers in cryptographic computing systems
INTEL CORP4 citations74
US11575504B2Feb 7, 2023
Cryptographic computing engine for memory load and store units of a microarchitecture pipeline
INTEL CORP5 citations74
US11693754B2Jul 4, 2023
Aggregate GHASH-based message authentication code (MAC) over multiple cachelines with incremental updates
INTEL CORP2 citations73
US11469902B2Oct 11, 2022
Systems and methods of using cryptographic primitives for error location, correction, and device recovery
INTEL CORP3 citations73
US11301344B2Apr 12, 2022
Aggregate GHASH-based message authentication code (MAC) over multiple cachelines with incremental updates
INTEL CORP3 citations73
US10594491B2Mar 17, 2020
Cryptographic system memory management
INTEL CORP1 citations73
US11972126B2Apr 30, 2024
Data relocation for inline metadata
INTEL CORP2 citations71
US10498865B2Dec 3, 2019
Security-oriented compression
INTEL CORP3 citations71
US12238221B2Feb 25, 2025
Cryptographic system memory management
INTEL CORP0 citations63
US11704297B2Jul 18, 2023
Collision-free hashing for accessing cryptographic computing metadata and for cache expansion
INTEL CORP0 citations63
US11531750B2Dec 20, 2022
Installing and manipulating a secure virtual machine image through an untrusted hypervisor
INTEL CORP0 citations63
US11429580B2Aug 30, 2022
Collision-free hashing for accessing cryptographic computing metadata and for cache expansion
INTEL CORP0 citations63
US11196565B2Dec 7, 2021
Cryptographic system memory management
INTEL CORP0 citations63
US10802910B2Oct 13, 2020
System for identifying and correcting data errors
INTEL CORP1 citations63
US12306998B2May 20, 2025
Stateless and low-overhead domain isolation using cryptographic computing
INTEL CORP0 citations62
US12066888B2Aug 20, 2024
Efficient security metadata encoding in error correcting code (ECC) memory without dedicated ECC bits
INTEL CORP0 citations62
US11711201B2Jul 25, 2023
Encoded stack pointers
INTEL CORP1 citations62
US11496486B2Nov 8, 2022
Methods and apparatus to support reliable digital communications without integrity metadata
INTEL CORP0 citations62
US11082432B2Aug 3, 2021
Methods and apparatus to support reliable digital communications without integrity metadata
INTEL CORP0 citations62
US11003584B2May 11, 2021
Technology for managing memory tags
INTEL CORP1 citations62
US10761928B2Sep 1, 2020
Combined secure mac and device correction using encrypted parity with multi-key domains
INTEL CORP1 citations62
US10261854B2Apr 16, 2019
Memory integrity violation analysis method and apparatus
INTEL CORP1 citations62
US12578889B2Mar 17, 2026
Apparatus, device, and method for a memory controller, memory controller, and system
INTEL CORP0 citations60
US12254203B2Mar 18, 2025
Message authentication Galois integrity and correction (MAGIC) for lightweight row hammer mitigation
INTEL CORP0 citations60
US12321467B2Jun 3, 2025
Cryptographic computing isolation for multi-tenancy and secure software components
INTEL CORP0 citations52
US12045128B1Jul 23, 2024
Secure error correcting code (ECC) trust execution environment (TEE) configuration metadata encoding
INTEL CORP0 citations52
US11995006B2May 28, 2024
Algebraic and deterministic memory authentication and correction with coupled cacheline metadata
INTEL CORP0 citations52
US11954045B2Apr 9, 2024
Object and cacheline granularity cryptographic memory integrity
INTEL CORP0 citations52
US11019098B2May 25, 2021
Replay protection for memory based on key refresh
INTEL CORP0 citations52
US12277234B2Apr 15, 2025
Cryptographic computing in multitenant environments
INTEL CORP0 citations51
US10929527B2Feb 23, 2021
Methods and arrangements for implicit integrity
INTEL CORP0 citations51
US10855815B2Dec 1, 2020
Security-oriented compression
INTEL CORP0 citations50
UNIV DUKE
7 patentsUS10788532B2Sep 29, 2020
Software-based self-test and diagnosis using on-chip memory
UNIV DUKE5 citations84
US9864007B2Jan 9, 2018
Software-based self-test and diagnosis using on-chip memory
UNIV DUKE6 citations84
US10444279B2Oct 15, 2019
Non-invasive pre-bond TSV test using ring oscillators and multiple voltage levels
UNIV DUKE2 citations73
US9720036B2Aug 1, 2017
Signal tracing using on-chip memory for in-system post-fabrication debug
UNIV DUKE3 citations73
US10732221B2Aug 4, 2020
Signal tracing using on-chip memory for in-system post-fabrication debug
UNIV DUKE1 citations62
US10845416B2Nov 24, 2020
Software-based self-test and diagnosis using on-chip memory
UNIV DUKE0 citations52
US9482720B2Nov 1, 2016
Non-invasive pre-bond TSV test using ring oscillators and multiple voltage levels
UNIV DUKE0 citations52
MARINISSEN ERIK JAN
1 patentShowing the top 50 of 54 patents by PatentIndex Score.