Inventor

MOSCHIANO VIOLANTE

IT187 patents

⚠️ This page may combine multiple inventors who share the name “MOSCHIANO VIOLANTE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MOSCHIANO VIOLANTE

MICRON TECHNOLOGY INC

Identifying asynchronous power loss

Apparatuses and methods for concurrently accessing different memory planes of a memory

Reading non-volatile multilevel memory cells

Sensing operations in a memory device

Non-volatile multilevel memory cell programming

Non-volatile multilevel memory cell programming

Charge loss compensation during programming of a memory device

Memory system performance enhancements using measured signal and noise characteristics of memory cells

Global-local read calibration

Memory sub-system with dynamic calibration using component-based function(s)

Using a status indicator in a memory sub-system to detect an event

Apparatuses and methods for concurrently accessing different memory planes of a memory

Architecture and method for memory programming

Page buffer connections and determining pass/fail condition of memories

Non-volatile memory programming

Non-volatile memory programming

Methods for programming a memory device and memory devices

Erase cycle counter usage in a memory device

Operation of a memory device during programming

Concurrently reading first and second pages of memory cells having different page addresses

Determining soft data

Word line voltage boost system and method for non-volatile memory devices and memory devices and processor-based system using same

Apparatuses and methods for concurrently accessing different memory planes of a memory

Pre-compensation of memory threshold voltage

Memory cell sensing using a boost voltage

Memory sub-system with dynamic calibration using component-based function(s)

Memory system performance enhancements using measured signal and noise characteristics of memory cells

Managing programming convergence associated with memory cells of a memory sub-system

Memory sub-system with dynamic calibration using component-based function(s)

Ultra-compact page buffer

Identifying asynchronous power loss

MOSCHIANO VIOLANTE

Threshold voltage compensation in a multilevel memory

Memory apparatus, systems, and methods

Level compensation in multilevel memory

Program verify operation in a memory device

Determining soft data for combinations of memory cells

Sensing scheme in a memory device

Memory arrays and methods of operating memory

Non-volatile memory programming

Method for kink compensation in a memory

Sensing for all bit line architecture in a memory device

Charge loss compensation during programming of a memory device

Charge loss compensation during programming of a memory device

ELMHURST DANIEL

Methods and apparatuses for refreshing non-volatile memory

Flash memory and associated methods

INTEL CORP

Method and apparatus for per-deck erase verify and dynamic inhibit in 3d NAND

Method and apparatus for reducing data program completion overhead in NAND flash

RUBY PAUL D

Non-volatile memory programming

GODA AKIRA

Data line management in a memory device

MICRON TECHNOLOGIES INC

Methods and apparatuses for programming flash memory using modulated pulses