Inventor
TOUTOUNCHI SHAHIN
US30 patents
⚠️ This page may combine multiple inventors who share the name “TOUTOUNCHI SHAHIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
XILINX INC
25 patentsUS6266269B1Jul 24, 2001
Three terminal non-volatile memory element
XILINX INC113 citations98
US6268639B1Jul 31, 2001
Electrostatic-discharge protection circuit
XILINX INC64 citations96
US6044012AMar 28, 2000
Non-volatile memory array using gate breakdown structure in standard sub 0.35 micron CMOS process
XILINX INC81 citations96
US6891395B2May 10, 2005
Application-specific testing methods for programmable logic devices
XILINX INC43 citations95
US6817006B1Nov 9, 2004
Application-specific testing methods for programmable logic devices
XILINX INC51 citations95
US7302625B1Nov 27, 2007
Built-in self test (BIST) technology for testing field programmable gate arrays (FPGAs) using partial reconfiguration
XILINX INC79 citations94
US7219287B1May 15, 2007
Automated fault diagnosis in a programmable device
XILINX INC36 citations92
US6645802B1Nov 11, 2003
Method of forming a zener diode
XILINX INC20 citations92
US6549458B1Apr 15, 2003
Non-volatile memory array using gate breakdown structures
XILINX INC25 citations92
US6522582B1Feb 18, 2003
Non-volatile memory array using gate breakdown structures
XILINX INC20 citations92
US7761755B1Jul 20, 2010
Circuit for and method of testing for faults in a programmable logic device
XILINX INC25 citations91
US6594610B1Jul 15, 2003
Fault emulation testing of programmable logic devices
XILINX INC36 citations91
US7917820B1Mar 29, 2011
Testing an embedded core
XILINX INC31 citations86
US7544968B1Jun 9, 2009
Non-volatile memory cell with charge storage element and method of programming
XILINX INC8 citations84
US6982451B1Jan 3, 2006
Single event upset in SRAM cells in FPGAs with high resistivity gate structures
XILINX INC15 citations84
US6732309B1May 4, 2004
Method for testing faults in a programmable logic device
XILINX INC15 citations83
US7725787B1May 25, 2010
Testing of a programmable device
XILINX INC5 citations73
US6920621B1Jul 19, 2005
Methods of testing for shorts in programmable logic devices using relative quiescent current measurements
XILINX INC9 citations73
US6732348B1May 4, 2004
Method for locating faults in a programmable logic device
XILINX INC10 citations68
US7687797B1Mar 30, 2010
Three-terminal non-volatile memory element with hybrid gate dielectric
XILINX INC3 citations62
US7454675B1Nov 18, 2008
Testing of a programmable device
XILINX INC3 citations62
US7452765B1Nov 18, 2008
Single event upset in SRAM cells in FPGAs with high resistivity gate structures
XILINX INC3 citations62
US7450431B1Nov 11, 2008
PMOS three-terminal non-volatile memory element and method of programming
XILINX INC3 citations62
US7420842B1Sep 2, 2008
Method of programming a three-terminal non-volatile memory element using source-drain bias
XILINX INC5 citations62
US7947980B1May 24, 2011
Non-volatile memory cell with charge storage element and method of programming
XILINX INC0 citations52
LSI LOGIC CORP
3 patentsUS5516731AMay 14, 1996
High-temperature bias anneal of integrated circuits for improved radiation hardness and hot electron resistance
LSI LOGIC CORP21 citations90
US5661069AAug 26, 1997
Method of forming an MOS-type integrated circuit structure with a diode formed in the substrate under a polysilicon gate electrode to conserve space
LSI LOGIC CORP10 citations74
US5561319AOct 1, 1996
Integrated circuit structure including CMOS devices protected by patterned nitride passivation and method for the fabrication thereof
LSI LOGIC CORP12 citations71