Inventor

FOX THOMAS W

US37 patents

⚠️ This page may combine multiple inventors who share the name “FOX THOMAS W”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FOX THOMAS W

IBM

Apparatus and method for updating pointers for indirect and parallel register access

Local bypass in memory computing

Low latency data exchange

Address generation in an active memory device

Active memory device gather, scatter, and filter

On-chip traffic prioritization in memory

Power management for in-memory computer systems

Cache miss thread balancing

On-chip traffic prioritization in memory

Cache miss thread balancing

High bandwidth low latency data exchange between processing elements

High bandwidth low latency data exchange between processing elements

On-chip traffic prioritization in memory

Chaining between exposed vector pipelines

Local bypass for in memory computing

Power management for a computer system

Low latency data exchange

Chaining between exposed vector pipelines

Power management for a computer system

Main processor support of tasks performed in memory

Main processor support of tasks performed in memory

Exposed-pipeline processing element with rollback

Exposed-pipeline processing element with rollback

Sequential location accesses in an active memory device

Mechanism for controlling subset of devices

FLEISCHER BRUCE M

Predication in a vector processor

Predication in a vector processor

Gather/scatter of multiple data elements with packed loading/storing into/from a register file entry

Vector register file

Vector register file

Gather/scatter of multiple data elements with packed loading/storing into /from a register file entry

Vector processing in an active memory device

Vector processing in an active memory device

Register file soft error recovery

Active buffered memory

ASAAD SAMEH

Multi-petascale highly efficient parallel supercomputer

GLOBALFOUNDRIES INC

Multi-petascale highly efficient parallel supercomputer