Inventor
LEIBOVICH GAL
IL19 patents
Patents
19 patentsUS10372416B2Aug 6, 2019
Multiply-accumulate “0” data gating
INTEL CORP15 citations93
US11037330B2Jun 15, 2021
Low rank matrix compression
INTEL CORP10 citations85
US10467795B2Nov 5, 2019
Sub-graph in frequency domain and dynamic selection of convolution implementation on a GPU
INTEL CORP6 citations83
US10372198B2Aug 6, 2019
Controlling performance states of processing engines of a processor
INTEL CORP6 citations83
US10324519B2Jun 18, 2019
Controlling forced idle state operation in a processor
INTEL CORP7 citations83
US9477243B2Oct 25, 2016
System maximum current protection
INTEL CORP6 citations83
US11620766B2Apr 4, 2023
Low rank matrix compression
INTEL CORP1 citations72
US11600035B2Mar 7, 2023
Sub-graph in frequency domain and dynamic selection of convolution implementation on a GPU
INTEL CORP1 citations72
US10853035B2Dec 1, 2020
Multiply-accumulate “0” data gating
INTEL CORP2 citations72
US10606559B2Mar 31, 2020
Multiply-accumulate “0” data gating
INTEL CORP1 citations72
US9760160B2Sep 12, 2017
Controlling performance states of processing engines of a processor
INTEL CORP4 citations72
US12131507B2Oct 29, 2024
Low rank matrix compression
INTEL CORP0 citations62
US11886984B2Jan 30, 2024
Variable precision and mix type representation of multiple layers in a network
INTEL CORP0 citations62
US11656846B2May 23, 2023
Multiply-accumulate “0” data gating
INTEL CORP0 citations62
US11250610B2Feb 15, 2022
Sub-graph in frequency domain and dynamic selection of convolution implementation on a GPU
INTEL CORP0 citations62
US11093822B2Aug 17, 2021
Variable precision and mix type representation of multiple layers in a network
INTEL CORP1 citations62
US11055604B2Jul 6, 2021
Per kernel Kmeans compression for neural networks
INTEL CORP0 citations57
US10762685B2Sep 1, 2020
Sub-graph in frequency domain and dynamic selection of convolution implementation on a GPU
INTEL CORP0 citations51
US10222851B2Mar 5, 2019
System maximum current protection
INTEL CORP0 citations51