Inventor
LEE HOCHUL
US27 patents
⚠️ This page may combine multiple inventors who share the name “LEE HOCHUL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
QUALCOMM INC
15 patentsUS10483457B1Nov 19, 2019
Differential spin orbit torque magnetic random access memory (SOT-MRAM) cell structure and array
QUALCOMM INC43 citations94
US10460785B1Oct 29, 2019
Parallel write scheme utilizing spin hall effect-assisted spin transfer torque random access memory
QUALCOMM INC8 citations84
US11114176B1Sep 7, 2021
Systems and methods to provide write termination for one time programmable memory cells
QUALCOMM INC7 citations83
US11250895B1Feb 15, 2022
Systems and methods for driving wordlines using set-reset latches
QUALCOMM INC6 citations73
US11164610B1Nov 2, 2021
Memory device with built-in flexible double redundancy
QUALCOMM INC4 citations72
US11152038B2Oct 19, 2021
Testing one-time programmable (OTP) memory with data input capture through sense amplifier circuit
QUALCOMM INC3 citations72
US10796735B1Oct 6, 2020
Read tracking scheme for a memory device
QUALCOMM INC4 citations72
US11568904B1Jan 31, 2023
Memory with positively boosted write multiplexer
QUALCOMM INC2 citations71
US11250924B1Feb 15, 2022
One-time programmable (OTP) memory cell circuits employing a diode circuit for area reduction, and related OTP memory cell array circuits and methods
QUALCOMM INC2 citations70
US11177010B1Nov 16, 2021
Bitcell for data redundancy
QUALCOMM INC3 citations70
US11640835B2May 2, 2023
Memory device with built-in flexible double redundancy
QUALCOMM INC0 citations62
US12451171B2Oct 21, 2025
High-speed and area-efficient parallel-write-and-read memory
QUALCOMM INC0 citations61
US12094528B2Sep 17, 2024
Memory with double redundancy
QUALCOMM INC0 citations61
US11854609B2Dec 26, 2023
Memory with reduced capacitance at a sense amplifier
QUALCOMM INC0 citations51
US11894050B2Feb 6, 2024
Memory with a sense amplifier isolation scheme for enhancing memory read bandwidth
QUALCOMM INC0 citations50
INSTON INC
6 patentsUS10102893B2Oct 16, 2018
Systems for implementing word line pulse techniques in magnetoelectric junctions
INSTON INC7 citations83
US10861527B2Dec 8, 2020
Systems and methods for optimizing magnetic torque and pulse shaping for reducing write error rate in magnetoelectric random access memory
INSTON INC4 citations72
US10460786B2Oct 29, 2019
Systems and methods for reducing write error rate in magnetoelectric random access memory through pulse sharpening and reverse pulse schemes
INSTON INC5 citations72
US10199100B1Feb 5, 2019
Sensing circuit and memory using thereof
INSTON INC1 citations61
US10255976B1Apr 9, 2019
Sensing circuit and memory using thereof
INSTON INC0 citations51
US9972400B1May 15, 2018
Nonvolatile memory device and calibration method for the same
INSTON INC0 citations51