P

Inventor

DEMAREST JAMES J

US38 patents
⚠️ This page may combine multiple inventors who share the name “DEMAREST JAMES J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

34 patents
US9666528B1May 30, 2017

BEOL vertical fuse formed over air gap

IBM430 citations99
US7122898B1Oct 17, 2006

Electrical programmable metal resistor

IBM15 citations93
US9449871B1Sep 20, 2016

Hybrid airgap structure with oxide liner

IBM21 citations92
US7402532B2Jul 22, 2008

Structure to improve adhesion between top CVD low-k dielectric and dielectric capping layer

IBM28 citations92
US7102232B2Sep 5, 2006

Structure to improve adhesion between top CVD low-k dielectric and dielectric capping layer

IBM19 citations92
US10043746B1Aug 7, 2018

Fabrication of vertical fuses from vertical fins

IBM11 citations84
US9985097B2May 29, 2018

Integrated capacitors with nanosheet transistors

IBM7 citations84
US9780027B2Oct 3, 2017

Hybrid airgap structure with oxide liner

IBM13 citations84
US9978678B1May 22, 2018

Vertically integrated nanosheet fuse

IBM5 citations83
US10319677B2Jun 11, 2019

Fabrication of vertical fuses from vertical fins

IBM2 citations73
US10170548B2Jan 1, 2019

Integrated capacitors with nanosheet transistors

IBM3 citations73
US9953915B2Apr 24, 2018

Electrically conductive interconnect including via having increased contact surface area

IBM3 citations73
US9793213B2Oct 17, 2017

Ion flow barrier structure for interconnect metallization

IBM2 citations73
US9553044B2Jan 24, 2017

Electrically conductive interconnect including via having increased contact surface area

IBM2 citations73
US9057670B2Jun 16, 2015

Transmission electron microscope sample fabrication

IBM5 citations73
US10475878B2Nov 12, 2019

BEOL capacitor through airgap metallization

IBM3 citations72
US7820559B2Oct 26, 2010

Structure to improve adhesion between top CVD low-K dielectric and dielectric capping layer

IBM4 citations72
US7287325B2Oct 30, 2007

Method of forming interconnect structure or interconnect and via structures using post chemical mechanical polishing

IBM3 citations63
US11113533B2Sep 7, 2021

Smart display apparatus and control system

IBM0 citations61
US10528817B2Jan 7, 2020

Smart display apparatus and control system

IBM1 citations61
US10043748B1Aug 7, 2018

Vertically integrated nanosheet fuse

IBM1 citations61
US9184042B1Nov 10, 2015

Wafer backside particle mitigation

IBM2 citations61
US10546813B2Jan 28, 2020

BEOL vertical fuse formed over air gap

IBM0 citations52
US10453793B2Oct 22, 2019

BEOL vertical fuse formed over air gap

IBM0 citations52
US10083908B2Sep 25, 2018

BEOL vertical fuse formed over air gap

IBM0 citations52
US9997454B2Jun 12, 2018

BEOL vertical fuse formed over air gap

IBM0 citations52
US9966305B2May 8, 2018

Ion flow barrier structure for interconnect metallization

IBM0 citations52
US7651892B2Jan 26, 2010

Electrical programmable metal resistor

IBM0 citations52
US10566414B2Feb 18, 2020

BEOL capacitor through airgap metallization

IBM0 citations51
US10319676B2Jun 11, 2019

Vertically integrated nanosheet fuse

IBM0 citations51
US9318347B2Apr 19, 2016

Wafer backside particle mitigation

IBM0 citations51
US7835564B2Nov 16, 2010

Non-destructive, below-surface defect rendering using image intensity analysis

IBM2 citations49
US7473636B2Jan 6, 2009

Method to improve time dependent dielectric breakdown

IBM0 citations42
US9331073B2May 3, 2016

Epitaxially grown quantum well finFETs for enhanced pFET performance

IBM0 citations40

CHENG KANGGUO

1 patent

HARAN BALASUBRAMANIAN S

1 patent

GLOBALFOUNDRIES INC

1 patent

CHANDA KAUSHIK

1 patent