Inventor
KUMAR TANUJ
IN6 patents
Patents
6 patentsUS11025252B2Jun 1, 2021
Circuit for detection of single bit upsets in generation of internal clock for memory
ST MICROELECTRONICS INT NV0 citations58
US12584961B2Mar 24, 2026
Built-in self test circuit for segmented static random access memory (SRAM) array input/output
ST MICROELECTRONICS INT NV0 citations50
US12437825B2Oct 7, 2025
At-speed transition fault testing for a multi-port and multi-clock memory
ST MICROELECTRONICS INT NV0 citations50
US12353341B2Jul 8, 2025
Tuning of read/write cycle time delay for a memory circuit dependent on operational mode selection
ST MICROELECTRONICS INT NV0 citations50
US12170120B2Dec 17, 2024
Built-in self test circuit for segmented static random access memory (SRAM) array input/output
ST MICROELECTRONICS INT NV0 citations50
US11393532B2Jul 19, 2022
Circuit and method for at speed detection of a word line fault condition in a memory circuit
ST MICROELECTRONICS INT NV0 citations49