Inventor

RAVIPALLI SREEDHAR

US7 patents

⚠️ This page may combine multiple inventors who share the name “RAVIPALLI SREEDHAR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

4 patents

US11593273B2Feb 28, 2023

CISCO TECH INC

2 patents

US10397115B1Aug 27, 2019

Longest prefix matching providing packet processing and/or memory efficiencies in processing of packets

CISCO TECH INC13 citations81

US10715439B2Jul 14, 2020

Longest prefix matching providing packet processing and/or memory efficiencies in processing of packets

CISCO TECH INC0 citations49

RAMCHANDANI RATAN

1 patent

US9276867B2Mar 1, 2016

Hierarchical scheduling system with layer bypass including updating scheduling information of a scheduling layer for each item whether or not it bypasses the scheduling layer

RAMCHANDANI RATAN0 citations25

RAVIPALLI SREEDHAR

INTEL CORP

Management of cache use requests sent to remote cache devices

Techniques for power management in compute circuits

Stacked die network interface controller circuitry

Chained command architecture for packet processing

CISCO TECH INC

Longest prefix matching providing packet processing and/or memory efficiencies in processing of packets

Longest prefix matching providing packet processing and/or memory efficiencies in processing of packets

RAMCHANDANI RATAN

Hierarchical scheduling system with layer bypass including updating scheduling information of a scheduling layer for each item whether or not it bypasses the scheduling layer