Inventor

YEUNG CHUN SUM

US28 patents

⚠️ This page may combine multiple inventors who share the name “YEUNG CHUN SUM”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YEUNG CHUN SUM

MICRON TECHNOLOGY INC

Select gate maintenance in a memory sub-system

Grown bad block management in a memory sub-system

Techniques for enhanced system performance after retention loss

Memory block erase protocol

Memory sub-system for monitoring mixed mode blocks

Efficient read disturb scanning

Techniques for retiring blocks of a memory system

Virtual indexing in a memory device

Memory block erase protocol

Memory sub-system for monitoring mixed mode blocks

Techniques for retiring blocks of a memory system

Power behavior detection in a memory device

Grown bad block management in a memory sub-system

Reduced parity data management

Techniques for managing temporarily retired blocks of a memory system

Voltage threshold prediction-based memory management

Power behavior detection in a memory device

Reduced parity data management

Parity protection

Proximity disturb remediation based on a number of programmed memory cells

Select gate maintenance in a memory sub-system

Parity protection

Techniques for enhanced system performance after retention loss

Redundant array management techniques

Memory stripe coding management

Wordline leakage test management

SANDISK TECHNOLOGIES INC

Visual indicator for portable device

Identification and operation of sub-prime blocks in nonvolatile memory