Inventor
TAKEOKA SADAMI
JP23 patents
⚠️ This page may combine multiple inventors who share the name “TAKEOKA SADAMI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD
19 patentsUS6734549B2May 11, 2004
Semiconductor device having a device for testing the semiconductor
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD39 citations96
US6625784B1Sep 23, 2003
Semiconductor integrated circuit device, method of testing the same, database for design of the same and method of designing the same
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD46 citations96
US7032196B2Apr 18, 2006
Semiconductor wiring substrate, semiconductor device, method for testing semiconductor device, and method for mounting semiconductor device
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD15 citations92
US5430736AJul 4, 1995
Method and apparatus for generating test pattern for sequential logic circuit of integrated circuit
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD41 citations92
US6799292B2Sep 28, 2004
Method for generating test pattern for semiconductor integrated circuit and method for testing semiconductor integrated circuit
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD40 citations88
US6499125B1Dec 24, 2002
Method for inserting test circuit and method for converting test data
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD18 citations84
US7197725B2Mar 27, 2007
Semiconductor integrated circuit and testing method for the same
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD13 citations83
US6615389B1Sep 2, 2003
Database for designing integrated circuit device, and method for designing integrated circuit device
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD6 citations74
US7348595B2Mar 25, 2008
Semiconductor wiring substrate, semiconductor device, method for testing semiconductor device, and method for mounting semiconductor device
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD4 citations73
US7171600B2Jan 30, 2007
Semiconductor wiring substrate, semiconductor device, method for testing semiconductor device, and method for mounting semiconductor device
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD4 citations73
US6427218B2Jul 30, 2002
Method of generating test pattern for semiconductor integrated circuit and method of testing the same
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD7 citations73
US6282506B1Aug 28, 2001
Method of designing semiconductor integrated circuit
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD5 citations73
US6708301B1Mar 16, 2004
Functional block for integrated circuit, semiconductor integrated circuit, inspection method for semiconductor integrated circuit, and designing method therefor
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD12 citations71
US7302658B2Nov 27, 2007
Methods for evaluating quality of test sequences for delay faults and related technology
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD2 citations62
US7203913B2Apr 10, 2007
Semiconductor integrated circuit device, method of testing the same, database for design of the same and method of designing the same
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD2 citations62
US7017135B2Mar 21, 2006
Method of designing semiconductor integrated circuit utilizing a scan test function
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD4 citations62
US6271677B1Aug 7, 2001
Semiconductor integrated circuit and method for testing the semiconductor integrated circuit
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD2 citations62
US6205566B1Mar 20, 2001
Semiconductor integrated circuit, method for designing the same, and storage medium where design program for semiconductor integrated circuit is stored
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD4 citations62
US7159143B2Jan 2, 2007
Method for evaluating delay test quality
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD0 citations51
PANASONIC CORP
4 patentsUS7613972B2Nov 3, 2009
Semiconductor integrated circuit, and designing method and testing method thereof
PANASONIC CORP26 citations92
US7610533B2Oct 27, 2009
Semiconductor integrated circuit and method for testing the same
PANASONIC CORP8 citations81
US7590908B2Sep 15, 2009
Semiconductor integrated circuit and method for testing the same
PANASONIC CORP9 citations81
US7475378B2Jan 6, 2009
Method of designing semiconductor integrated circuit in which fault detection can be effected through scan-in and scan-out
PANASONIC CORP0 citations52