Inventor

YACH RANDY L

US30 patents

⚠️ This page may combine multiple inventors who share the name “YACH RANDY L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YACH RANDY L

MICROCHIP TECH INC

Microcontroller power-up delay

Switched ground read for EPROM memory array

Phase locked loop with improved lock time and stability

Layout technique for a matching capacitor array using a continuous top electrode

Microcontroller with brownout detection

Power-on reset circuit

High quality factor capacitor

Low capacitance ESD-protection structure under a bond pad

Layout technique for a capacitor array using continuous upper electrodes

Voltage regulator and boosting circuit for reading a memory cell at low voltage levels

Voltage reference generator for EPROM memory array

Memory device having selectable redundancy for high endurance and reliability and method therefor

Independently programmable memory segments within a PMOS electrically erasable programmable read only memory array achieved by N-well separation and method therefor

Independently programmable memory segments within a PMOS electrically erasable programmable read only memory array achieved by N-well separation and method therefor

Voltage regulator for clamping a row voltage of a memory cell

Data pointer for outputting indirect addressing mode addresses within a single cycle and method therefor

High voltage ESD-protection structure

High voltage ESD-protection structure

Force page paging scheme for microcontrollers of various sizes using data random access memory

Force page zero paging scheme for microcontrollers using data random access memory

Overcharge/discharge voltage regulator for EPROM memory array

Self timed precharge sense amplifier for a memory array

Event detection with a digital processor

Computer system for allowing a two word jump instruction to be executed in the same number of cycles as a single word jump instruction

Computer system for allowing a two word jump instruction to be executed in the same number of cycles as a single word jump instruction

High voltage ESD-protection structure

Interconnect monitor utilizing both open and short detection

(unassigned)

Time delay circuit which is voltage independent

RISC-based microcontroller with peripheral function added to a split data bus

BRAITHWAITE ROHAN S

Vertical DMOS-field effect transistor