Inventor
TAKENO HIROSHI
JP34 patents
⚠️ This page may combine multiple inventors who share the name “TAKENO HIROSHI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SHINETSU HANDOTAI KK
23 patentsUS6478883B1Nov 12, 2002
Silicon single crystal wafer, epitaxial silicon wafer, and methods for producing them
SHINETSU HANDOTAI KK84 citations97
US6264906B1Jul 24, 2001
Method for heat treatment of silicon substrate, substrate treated by the method, and epitaxial wafer utilizing the substrate
SHINETSU HANDOTAI KK17 citations92
US6206961B1Mar 27, 2001
Method of determining oxygen precipitation behavior in a silicon monocrystal
SHINETSU HANDOTAI KK24 citations92
US6143071ANov 7, 2000
Method for heat treatment of silicon substrate, substrate treated by the method, and epitaxial wafer utilizing the substrate
SHINETSU HANDOTAI KK31 citations92
US6544490B1Apr 8, 2003
Silicon wafer and production method thereof and evaluation method for silicon wafer
SHINETSU HANDOTAI KK20 citations88
US7311888B2Dec 25, 2007
Annealed wafer and method for manufacturing the same
SHINETSU HANDOTAI KK11 citations84
US7033962B2Apr 25, 2006
Methods for manufacturing silicon wafer and silicone epitaxial wafer, and silicon epitaxial wafer
SHINETSU HANDOTAI KK9 citations74
US7189293B2Mar 13, 2007
Method of producing annealed wafer and annealed wafer
SHINETSU HANDOTAI KK7 citations73
US6277715B1Aug 21, 2001
Production method for silicon epitaxial wafer
SHINETSU HANDOTAI KK13 citations73
US6858094B2Feb 22, 2005
Silicon wafer and silicon epitaxial wafer and production methods therefor
SHINETSU HANDOTAI KK6 citations72
US5598452AJan 28, 1997
Method of evaluating a silicon single crystal
SHINETSU HANDOTAI KK7 citations69
US7749861B2Jul 6, 2010
Method for manufacturing SOI substrate and SOI substrate
SHINETSU HANDOTAI KK3 citations63
US7229501B2Jun 12, 2007
Silicon epitaxial wafer and process for manufacturing the same
SHINETSU HANDOTAI KK2 citations63
US6544332B1Apr 8, 2003
Method for manufacturing silicon single crystal, silicon single crystal manufactured by the method, and silicon wafer
SHINETSU HANDOTAI KK6 citations63
US7902042B2Mar 8, 2011
Method of manufacturing SOI wafer and thus-manufactured SOI wafer
SHINETSU HANDOTAI KK2 citations62
US7910455B2Mar 22, 2011
Method for producing SOI wafer
SHINETSU HANDOTAI KK2 citations60
US10886129B2Jan 5, 2021
Method for manufacturing semiconductor device and method for evaluating semiconductor device
SHINETSU HANDOTAI KK0 citations58
US9530702B2Dec 27, 2016
Method for measuring recombination lifetime of silicon substrate
SHINETSU HANDOTAI KK0 citations52
US7985660B2Jul 26, 2011
Method for manufacturing soi wafer
SHINETSU HANDOTAI KK0 citations52
US6544899B2Apr 8, 2003
Process for manufacturing silicon epitaxial wafer
SHINETSU HANDOTAI KK1 citations52
US9748151B2Aug 29, 2017
Method for evaluating semiconductor substrate
SHINETSU HANDOTAI KK1 citations51
US7799660B2Sep 21, 2010
Method for manufacturing SOI substrate
SHINETSU HANDOTAI KK0 citations41
US10297463B2May 21, 2019
Method for manufacturing silicon wafer
SHINETSU HANDOTAI KK0 citations40
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD
5 patentsUS5377266ADec 27, 1994
Scramble apparatus and descramble apparatus
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD66 citations96
US5636279AJun 3, 1997
Scramble apparatus and descramble apparatus
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD38 citations92
US5604499AFeb 18, 1997
Variable-length decoding apparatus
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD48 citations92
US5568140AOct 22, 1996
Header detector and associated decoding apparatus
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD44 citations92
US5625355AApr 29, 1997
Apparatus and method for decoding variable-length code
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD50 citations91