Inventor

BOWEN ROBERT C

US29 patents

⚠️ This page may combine multiple inventors who share the name “BOWEN ROBERT C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BOWEN ROBERT C

SAMSUNG ELECTRONICS CO LTD

Integrated circuits with Si and non-Si nanosheet FET co-integration with low band-to-band tunneling and methods of fabricating the same

Strained stacked nanosheet FETS and/or quantum well stacked nanosheet

Thermionically-overdriven tunnel FETs and methods of fabricating the same

Strained stacked nanosheet FETs and/or quantum well stacked nanosheet

Low resistivity damascene interconnect

Confined semi-metal field effect transistor

Methods of fabricating quantum well field effect transistors having multiple delta doped layers

Finfet devices including high mobility channel materials with materials of graded composition in recessed source/drain regions

Integrated circuit devices including FinFETs and methods of forming the same

Integrated circuit devices including strained channel regions and methods of forming the same

Quantum interference based logic devices including electron monochromator

TEXAS INSTRUMENTS INC

Forming a retrograde well in a transistor to enhance performance of the transistor

Enhanced PMOS via transverse stress

Forming a retrograde well in a transistor to enhance performance of the transistor

Gated resonant tunneling diode

Gated resonant tunneling diode

Gated resonant tunneling diode

Method of forming enhanced device via transverse stress

OBRADOVIC BORNA J

Crystalline multiple-nanosheet strained channel FETs and methods of fabricating the same

Semiconductor devices with structures for suppression of parasitic bipolar effect in stacked nanosheet FETs and methods of fabricating the same

Multi-layer fin field effect transistor devices and methods of forming the same

Integrated circuit devices including FinFETS and methods of forming the same

FinFET devices including recessed source/drain regions having optimized depths

WANG WEI-E

Methods of forming semiconductor patterns including reduced dislocation defects and devices formed using such methods

WEIGH TECH INC

Cement slurry reclamation system and method

EDWARDS HENRY L

Quantum electro-optical device using CMOS transistor with reverse polarity drain implant

CADDOCK ELECTRONICS INC

Method of soldering leads to electrical components

RODDER MARK S

FinFET semiconductor devices including recessed source-drain regions on a bottom semiconductor layer and methods of fabricating the same

KITTL JORGE A

Structure and method to achieve large strain in NS without addition of stack-generated defects