Inventor
TETRICK RAYMOND S
US20 patents
⚠️ This page may combine multiple inventors who share the name “TETRICK RAYMOND S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
19 patentsUS6003112ADec 14, 1999
Memory controller and method for clearing or copying memory utilizing register files to store address information
INTEL CORP86 citations96
US4570220AFeb 11, 1986
High speed parallel bus and data transfer method
INTEL CORP194 citations94
US6598199B2Jul 22, 2003
Memory array organization
INTEL CORP27 citations92
US6006301ADec 21, 1999
Multi-delivery scheme interrupt router
INTEL CORP37 citations92
US4807109AFeb 21, 1989
High speed synchronous/asynchronous local bus and data transfer method
INTEL CORP58 citations90
US10241710B2Mar 26, 2019
Multi-level memory with direct access
INTEL CORP4 citations84
US9098402B2Aug 4, 2015
Techniques to configure a solid state drive to operate in a storage mode or a memory mode
INTEL CORP5 citations84
US6622212B1Sep 16, 2003
Adaptive prefetch of I/O data blocks
INTEL CORP15 citations84
US7360027B2Apr 15, 2008
Method and apparatus for initiating CPU data prefetches by an external agent
INTEL CORP16 citations82
US9678666B2Jun 13, 2017
Techniques to configure a solid state drive to operate in a storage mode or a memory mode
INTEL CORP3 citations73
US7089399B2Aug 8, 2006
Adaptive prefetch of I/O data blocks
INTEL CORP8 citations73
US9703502B2Jul 11, 2017
Multi-level memory with direct access
INTEL CORP1 citations63
US9430151B2Aug 30, 2016
Multi-level memory with direct access
INTEL CORP2 citations63
US11042297B2Jun 22, 2021
Techniques to configure a solid state drive to operate in a storage mode or a memory mode
INTEL CORP0 citations62
US7783809B2Aug 24, 2010
Virtualization of pin functionality in a point-to-point interface
INTEL CORP2 citations62
US6757798B2Jun 29, 2004
Method and apparatus for arbitrating deferred read requests
INTEL CORP6 citations62
US10817201B2Oct 27, 2020
Multi-level memory with direct access
INTEL CORP0 citations52
US10296217B2May 21, 2019
Techniques to configure a solid state drive to operate in a storage mode or a memory mode
INTEL CORP0 citations52
US6912556B1Jun 28, 2005
Silicon averaging measurement circuit
INTEL CORP0 citations52