Inventor

CHANG YEONG-JAR

TW18 patents

⚠️ This page may combine multiple inventors who share the name “CHANG YEONG-JAR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHANG YEONG-JAR

IND TECH RES INST

Method and apparatus of build-in self-diagnosis and repair in a memory with syndrome identification

Wrapper testing circuits and method thereof for system-on-a-chip

Built-in memory current test circuit

Opposite-phase scheme for peak current reduction

IC with built-in self-test and design method thereof

Built-in jitter measurement circuit for voltage controlled oscillator and phase locked loop

Opposite-phase scheme for peak current reduction

Memory power models related to access information and methods thereof

Thermal simulation device and method

FARADAY TECH CORP

Built-in jitter measurement circuit

Programmable memory built-in self-test circuit and clock switching circuit thereof

Sample and hold circuit and related data signal detecting method utilizing sample and hold circuit

Built-in self test circuit for analog-to-digital converter and phase lock loop and the testing methods thereof

Controllable delay line and regulation compensation circuit thereof

Clock jitter measurement circuit and integrated circuit having the same

On-chip apparatus and method for jitter measurement

HUANG PO-YAO

Semiconductor package structure and manufacturing method thereof

CHANG YEONG JAR

Thermal estimation device and thermal estimation method