Inventor
HSU STEVEN
US21 patents
⚠️ This page may combine multiple inventors who share the name “HSU STEVEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
16 patentsUS9641160B2May 2, 2017
Common N-well state retention flip-flop
INTEL CORP8 citations84
US10491217B2Nov 26, 2019
Low-power clock gate circuit
INTEL CORP5 citations72
US10473718B2Nov 12, 2019
Multibit vectored sequential with scan
INTEL CORP4 citations72
US7426127B2Sep 16, 2008
Full-rail, dual-supply global bitline accelerator CAM circuit
INTEL CORP2 citations63
US11791819B2Oct 17, 2023
Low power flip-flop with reduced parasitic capacitance
INTEL CORP0 citations62
US11442103B2Sep 13, 2022
Multibit vectored sequential with scan
INTEL CORP0 citations62
US11398814B2Jul 26, 2022
Low-power single-edge triggered flip-flop, and time borrowing internally stitched flip-flop
INTEL CORP1 citations62
US11009549B2May 18, 2021
Multibit vectored sequential with scan
INTEL CORP0 citations62
US7161826B2Jan 9, 2007
Low-noise leakage-tolerant register file technique
INTEL CORP2 citations62
US11757434B2Sep 12, 2023
High performance fast Mux-D scan flip-flop
INTEL CORP0 citations61
US11296681B2Apr 5, 2022
High performance fast Mux-D scan flip-flop
INTEL CORP0 citations61
US12386618B2Aug 12, 2025
Multi-buffered register files with shared access circuits
INTEL CORP0 citations59
US11054470B1Jul 6, 2021
Double edge triggered Mux-D scan flip-flop
INTEL CORP0 citations58
US12566212B2Mar 3, 2026
Power efficient register files for deep neural network (DNN) accelerator
INTEL CORP0 citations55
US12243148B2Mar 4, 2025
Apparatus and method for approximate trilinear interpolation for scene reconstruction
INTEL CORP0 citations50
US12223615B2Feb 11, 2025
Apparatus and method for approximate trilinear interpolation for scene reconstruction
INTEL CORP0 citations50