Inventor

RARICK LEONARD D

US33 patents

⚠️ This page may combine multiple inventors who share the name “RARICK LEONARD D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

RARICK LEONARD D

SUN MICROSYSTEMS INC

Processor including general-purpose and cryptographic functionality in which cryptographic operations are visible to user-specified software

Apparatus and method for implementing a unified hash algorithm pipeline

Method and apparatus for generating pseudo-random numbers

Multiply execution unit that includes 4:2 and/or 5:3 compressors for performing integer and XOR multiplication

Efficient accuracy check for Newton-Raphson divide and square-root operations

System, method and apparatus for an improved MD5 hash algorithm

Efficient hardware square-root operation

Efficient hardware divide operation

Method and apparatus for fast RC4-like encryption

Continuous random number generation method and apparatus

Adder including generate and propagate bits corresponding to multiple columns

Apparatus and method for efficient modular exponentiation

System and method for small read only data

System and method of placing components for minimizing wire congestion and wire length in performing a function

Multiply execution unit for performing integer and XOR multiplication

Execution unit for performing the data encryption standard

System and method for small read only data

RARICK LEONARD D

Leading zero estimation modification for unfused rounding catastrophic cancellation

Carry look-ahead adder with generate bits and propagate bits used for column sums

Method and system for processing the booth encoding 33RD term

Execution unit for performing the data encryption standard

Modulus-based error-checking technique

Efficient leading zero anticipator

ORACLE AMERICA INC

Apparatus and method for implementing a hash algorithm word buffer

Fused multiply-add rounding and unfused multiply-add rounding in a single multiply-add module

Apparatus and method for cryptographic key expansion

Efficient error-check and exact-check for Newton-Raphson divide and square-root operations

Execution unit for performing the data encryption standard

HYUNDAI ELECTRONICS AMERICA

Modified Wallace-Tree adder for high-speed binary multiplier, structure and method

Reducing the number of carry-look-ahead adder stages in high-speed arithmetic units, structure and method

METAFLOW TECHNOLOGIES INC

Apparatus for computing transcendental functions quickly

ST MICROELECTRONICS INC

Apparatus for computing transcendental functions quickly

INAGANTI MURALI K

Fused multiply-add rounding and unfused multiply-add rounding in a single multiply-add module