Inventor

CHIOU WEN-CHIH

TW360 patents

⚠️ This page may combine multiple inventors who share the name “CHIOU WEN-CHIH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHIOU WEN-CHIH

TAIWAN SEMICONDUCTOR MFG

Package with metal-insulator-metal capacitor and method of manufacturing the same

3D packages and methods for forming the same

Multi-die stacking using bumps with different sizes

Three dimensional integrated circuit and method of making the same

Methods of forming integrated circuit package

Method for forming dummy structures for improved CMP and reduced capacitance

Slurry dispenser having multiple adjustable nozzles

Temporary carrier bonding and detaching processes

Through-substrate vias (TSVs) electrically connected to a bond pad design with reduced dishing effect

Three-dimensional integrated circuits with protection layers

Structure and method for stacked wafer fabrication

Formation of through via before contact processing

Three-dimensional integrated circuits with protection layers

Semiconductor contact structure

Method for preventing low-k dielectric layer cracking in multi-layered dual damascene metallization layers

Eliminate broken line damage of copper after CMP

3D packages and methods for forming the same

TAIWAN SEMICONDUCTOR MFG CO LTD

Dummy structure for chip-on-wafer-on-substrate

Semiconductor package

3D stacked-chip package

Optical transceiver

Integrated circuit packages and methods of forming the same

Low cost and ultra-thin chip on wafer on substrate (CoWoS) formation

3D stacked-chip package

Integrated circuit package and method

Giga interposer integration through chip-on-wafer-on-substrate

Isolation bonding film for semiconductor packages and methods of forming the same

Singulation and bonding methods and structures formed thereby

Die stack structure and method of fabricating the same

Forming metal bonds with recesses

3D packages and methods for forming the same

Semiconductor structure and manufacturing method thereof

YU CHEN-HUA

Interconnect structures for substrate

Light-emitting diodes on concave texture substrate

Light-emitting diodes on concave texture substrate

Light-emitting diode with textured substrate

Method for producing a protective structure

HU HSIEN-PIN

Approach for bonding dies onto interposers

Approach for bonding dies onto interposers

Approach for bonding dies onto interposers

CHANG HUNG-PIN

Method of forming bump structure having tapered sidewalls for stacked dies

System, structure, and method of manufacturing a semiconductor substrate stack

LIN YUNG-CHI

TSV structures and methods for forming the same

SHIH YING-CHING

Embedded 3D interposer structure

CHEN MING-FA

Wafer backside interconnect structure connected to TSVs

CHANG HSIN

Alignment marks in substrate having through-substrate via (TSV)

WU WENG-JIN

Multi-die stacking using bumps with different sizes

CHIOU WEN-CHIH

Backside metal of redistribution line with silicide layer on through-silicon via of semiconductor chips

YANG KU-FENG

Wafer bonding

CHEN DING-YUAN

Light-emitting diode integration scheme