P

Inventor

MURAKATA MASAMI

JP12 patents

Patents

12 patents
US6645842B2Nov 11, 2003

Semiconductor integrated circuit device, semiconductor integrated circuit wiring method, and cell arranging method

TOSHIBA KK125 citations99
US6436804B2Aug 20, 2002

Semiconductor integrated circuit device, semiconductor integrated circuit wiring method, and cell arranging method

TOSHIBA KK138 citations99
US6262487B1Jul 17, 2001

Semiconductor integrated circuit device, semiconductor integrated circuit wiring method, and cell arranging method

TOSHIBA KK452 citations99
US6546540B1Apr 8, 2003

Method of automatic layout design for LSI, mask set and semiconductor integrated circuit manufactured by automatic layout design method, and recording medium storing automatic layout design program

TOSHIBA KK157 citations98
US6813756B2Nov 2, 2004

Method of automatic layout design for LSI, mask set and semiconductor integrated circuit manufactured by automatic layout design method, and recording medium storing automatic layout design program

TOSHIBA KK46 citations96
US6459331B1Oct 1, 2002

Noise suppression circuit, ASIC, navigation apparatus communication circuit, and communication apparatus having the same

TOSHIBA KK26 citations92
US5140402AAug 18, 1992

Automatic placement method for arranging logic cells

TOSHIBA KK39 citations92
US4839821AJun 13, 1989

Automatic cell-layout arranging method and apparatus for polycell logic LSI

TOSHIBA KK28 citations92
US6118334ASep 12, 2000

Semiconductor integrated circuit and power supply routing method and system

TOSHIBA KK18 citations84
US7075336B2Jul 11, 2006

Method for distributing clock signals to flip-flop circuits

TOSHIBA KK18 citations82
US7064691B2Jun 20, 2006

Noise suppression circuit, ASIC, navigation apparatus, communication circuit, and communication apparatus having the same

TOSHIBA KK6 citations73
US7230554B2Jun 12, 2007

Noise suppression circuit, ASIC, navigation apparatus, communication circuit, and communication apparatus having the same

TOSHIBA KK1 citations51