Inventor
LAMB JOSEPH M
US14 patents
⚠️ This page may combine multiple inventors who share the name “LAMB JOSEPH M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
STRATUS COMPUTER INC
8 patentsUS5379381AJan 3, 1995
System using separate transfer circuits for performing different transfer operations respectively and scanning I/O devices status upon absence of both operations
STRATUS COMPUTER INC64 citations95
US4931922AJun 5, 1990
Method and apparatus for monitoring peripheral device communications
STRATUS COMPUTER INC36 citations95
US4974150ANov 27, 1990
Fault tolerant digital data processor with improved input/output controller
STRATUS COMPUTER INC33 citations94
US4974144ANov 27, 1990
Digital data processor with fault-tolerant peripheral interface
STRATUS COMPUTER INC27 citations91
US4926315AMay 15, 1990
Digital data processor with fault tolerant peripheral bus communications
STRATUS COMPUTER INC24 citations90
US5559459ASep 24, 1996
Clock signal generation arrangement including digital noise reduction circuit for reducing noise in a digital clocking signal
STRATUS COMPUTER INC44 citations87
US4939643AJul 3, 1990
Fault tolerant digital data processor with improved bus protocol
STRATUS COMPUTER INC20 citations81
US5257383AOct 26, 1993
Programmable interrupt priority encoder method and apparatus
STRATUS COMPUTER INC13 citations73
NETRONOME SYSTEMS INC
6 patentsUS9270488B2Feb 23, 2016
Reordering PCP flows as they are assigned to virtual channels
NETRONOME SYSTEMS INC2 citations62
US9208844B1Dec 8, 2015
DDR retiming circuit
NETRONOME SYSTEMS INC3 citations54
US9258256B2Feb 9, 2016
Inverse PCP flow remapping for PFC pause frame generation
NETRONOME SYSTEMS INC1 citations51
US9515946B2Dec 6, 2016
High-speed dequeuing of buffer IDS in frame storing system
NETRONOME SYSTEMS INC0 citations41
US9264256B2Feb 16, 2016
Merging PCP flows as they are assigned to a single virtual channel
NETRONOME SYSTEMS INC0 citations41
US9891985B1Feb 13, 2018
256-bit parallel parser and checksum circuit with 1-hot state information bus
NETRONOME SYSTEMS INC0 citations30