P

Inventor

SIMON ALLEN H

US20 patents
⚠️ This page may combine multiple inventors who share the name “SIMON ALLEN H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

18 patents
US5225904AJul 6, 1993

Adaptive digital video compression system

INTEL CORP136 citations98
US4868653ASep 19, 1989

Adaptive digital video compression system

INTEL CORP135 citations98
US4918523AApr 17, 1990

Digital video formatting and transmission system and method

INTEL CORP203 citations97
US5079630AJan 7, 1992

Adaptive video compression system

INTEL CORP106 citations96
US5430854AJul 4, 1995

Simd with selective idling of individual processors based on stored conditional flags, and with consensus among all flags used for conditional branching

INTEL CORP60 citations95
US5189636AFeb 23, 1993

Dual mode combining circuitry

INTEL CORP76 citations95
US5187793AFeb 16, 1993

Processor with hierarchal memory and using meta-instructions for software control of loading, unloading and execution of machine instructions stored in the cache

INTEL CORP91 citations95
US5047975ASep 10, 1991

Dual mode adder circuitry with overflow detection and substitution enabled for a particular mode

INTEL CORP86 citations95
US5361370ANov 1, 1994

Single-instruction multiple-data processor having dual-ported local memory architecture for simultaneous data transmission on local memory ports and global port

INTEL CORP67 citations94
US5859663AJan 12, 1999

Audio control system for video teleconferencing

INTEL CORP46 citations92
US4967196AOct 30, 1990

Apparatus for decoding variable-length encoded data

INTEL CORP24 citations92
US5088053AFeb 11, 1992

Memory controller as for a video signal processor

INTEL CORP40 citations89
US5548793AAug 20, 1996

System for controlling arbitration using the memory request signal types generated by the plurality of datapaths

INTEL CORP17 citations81
US5530884AJun 25, 1996

System with plurality of datapaths having dual-ported local memory architecture for converting prefetched variable length data to fixed length decoded data

INTEL CORP18 citations81
US5517665AMay 14, 1996

System for controlling arbitration using the memory request signal types generated by the plurality of datapaths having dual-ported local memory architecture for simultaneous data transmission

INTEL CORP11 citations72
US4881194ANov 14, 1989

Stored-program controller for equalizing conditional branch delays

INTEL CORP16 citations72
US7263231B2Aug 28, 2007

Method and apparatus for performing video image decoding

INTEL CORP8 citations70
US6459452B1Oct 1, 2002

System, method, and apparatus for decoding digital video sequences

INTEL CORP3 citations63

TECHNOLOGY INC 64

2 patents