Inventor

LIU CHEN-CHIN

TW39 patents

⚠️ This page may combine multiple inventors who share the name “LIU CHEN-CHIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIU CHEN-CHIN

MACRONIX INT CO LTD

Method for fabricating nitride read-only memory

Nitride read only memory cell

Method of fabricating silicon nitride read only memory

Method of forming the protective film to prevent nitride read only memory cell charging

Method of over-erase prevention in a non-volatile memory device and related structure

Shallow trench isolation method used in a semiconductor wafer

High gate coupling non-volatile memory structure

Word line strap layout structure

Erase operation for use in non-volatile memory

Memory array including isolation between memory cell and dummy cell portions

Method of forming a three-dimensional polysilicon layer on a semiconductor wafer

Nitride ready only memory cell with two top oxide layers and the method for manufacturing the same

Bit line selection transistor layout structure

Method for forming non-volatile memory cell with low-temperature-formed dielectric between word and bit lines, and non-volatile memory array including such memory cells

Non-volatile memory cell with dielectric spacers along sidewalls of a component stack, and method for forming same

Method for preventing bit line to bit line leakage in memory cell

Method of increasing cell retention capacity of silicon nitride read-only-memory cell

Apparatus and associated method for making a floating gate cell with increased overlay between the control gate and floating gate

Apparatus and associated method for making a floating gate cell with increased overlay between the control gate and floating gate

Apparatus and associated method for making a floating gate cell in a virtual ground array

TAIWAN SEMICONDUCTOR MFG CO LTD

Semiconductor device and a method for fabricating the same

Method of manufacturing a semiconductor device having deep wells

Method for manufacturing a finger trench capacitor with a split-gate flash memory cell

Interdigitated capacitor to integrate with flash memory

Integration techniques for MIM or MIP capacitors with flash memory and/or high-κ metal gate CMOS technology

Semiconductor device and manufacturing method thereof

Anti-dishing structure for embedded memory

Cell-like floating-gate test structure

Semiconductor device having deep wells

Cell-like floating-gate test structure

Semiconductor device and a method for fabricating the same

Semiconductor device and manufacturing method thereof

Semiconductor device and manufacturing method thereof

Semiconductor device having deep wells

Method of manufacturing a semiconductor device having deep wells

Semiconductor device and a method for fabricating the same

Anti-dishing structure for embedded memory

Cell-like floating-gate test structure

Semiconductor device and manufacturing method thereof