Inventor
DUVALSAINT KARL J
US16 patents
⚠️ This page may combine multiple inventors who share the name “DUVALSAINT KARL J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
DUVALSAINT KARL J
8 patentsUS9122617B2Sep 1, 2015
Pseudo cache memory in a multi-core processor (MCP)
DUVALSAINT KARL J4 citations72
US8806129B2Aug 12, 2014
Mounted cache memory in a multi-core processor (MCP)
DUVALSAINT KARL J5 citations72
US8438404B2May 7, 2013
Main processing element for delegating virtualized control threads controlling clock speed and power consumption to groups of sub-processing elements in a system such that a group of sub-processing elements can be designated as pseudo main processing element
DUVALSAINT KARL J3 citations61
US8341638B2Dec 25, 2012
Delegated virtualization across physical partitions of a multi-core processor (MCP)
DUVALSAINT KARL J2 citations61
US8261117B2Sep 4, 2012
Virtualization in a multi-core processor (MCP)
DUVALSAINT KARL J3 citations61
US8775840B2Jul 8, 2014
Virtualization in a multi-core processor (MCP)
DUVALSAINT KARL J0 citations51
US8732716B2May 20, 2014
Virtualization across physical partitions of a multi-core processor (MCP)
DUVALSAINT KARL J0 citations51
US9824008B2Nov 21, 2017
Cache memory sharing in a multi-core processor (MCP)
DUVALSAINT KARL J0 citations41
IBM
5 patentsUS9606855B1Mar 28, 2017
Caller protected stack return address in a hardware managed stack architecture
IBM16 citations92
US10120745B2Nov 6, 2018
Providing instructions to protect stack return addresses in a hardware managed stack architecture
IBM3 citations73
US9891919B2Feb 13, 2018
Caller protected stack return address in a hardware managed stack architecture
IBM4 citations73
US10635441B2Apr 28, 2020
Caller protected stack return address in a hardware managed stack architecture
IBM0 citations52
US9361160B2Jun 7, 2016
Virtualization across physical partitions of a multi-core processor (MCP)
IBM0 citations51