Inventor

ONTALUS VIOREL C

US23 patents

⚠️ This page may combine multiple inventors who share the name “ONTALUS VIOREL C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ONTALUS VIOREL C

IBM

Stressed channel FET with source/drain buffers

Reducing dislocation formation in semiconductor devices through targeted carbon implantation

Activating dopants using multiple consecutive millisecond-range anneals

Semiconductor structures and methods of manufacturing the same

Pre-gate, source/drain strain layer formation

Stressed channel FET with source/drain buffers

Field effect transistor device

Structure and method for increasing strain in a device

Method and structure for differential silicide and recessed or raised source/drain to improve field effect transistor

Method for growing strain-inducing materials in CMOS circuits in a gate first flow

GLOBALFOUNDRIES US INC

Bipolar transistor with base horizontally displaced from collector

Bipolar transistor with elevated extrinsic base and methods to form same

Insulated-gate bipolar transistor with enhanced frequency response, and related methods

CHAN KEVIN K

Field effect transistor device

Structure and method for increasing strain in a device

LI XI

Semiconductor structures and methods of manufacturing the same

Semiconductor structures and methods of manufacturing the same

HOLT JUDSON R

Self aligned device with enhanced stress and methods of manufacture

Self aligned device with enhanced stress and methods of manufacture

JOHNSON JEFFREY B

Asymmetric source and drain stressor regions

GLOBALFOUNDRIES INC

Contact resistance optimization via EPI growth engineering

LAVOIE CHRISTIAN

Method and structure for differential silicide and recessed or raised source/drain to improve field effect transistor

BAI BO

Method for growing strain-inducing materials in CMOS circuits in a gate first flow