Inventor

MARTINELLI ANDREA

IT43 patents

⚠️ This page may combine multiple inventors who share the name “MARTINELLI ANDREA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MARTINELLI ANDREA

MICRON TECHNOLOGY INC

Shared decoder architecture for three-dimensional memory arrays

Parallel access in a memory array

Balancing data for storage in a memory device

Architecture-based power management for a memory device

Method and apparatuses for performing a voltage adjustment operation on a section of memory cells based on a quantity of access operations

Decoding architecture for memory tiles

Bank configurable power modes

Toggling known patterns for reading memory cells in a memory device

Parallel access in a memory array

Shared decoder architecture for three-dimensional memory arrays

Circuit partitioning for a memory device

Memory device with data scrubbing capability and methods

Bank configurable power modes

Program current controller and sense circuit for cross-point memory devices

Decoding architecture for memory tiles

Architecture-based power management for a memory device

Balancing data for storage in a memory device

Access schemes for activity-based data protection in a memory device

Input/output line sharing for memory arrays

Circuit partitioning for a memory device

Circuitry borrowing for memory arrays

Circuitry borrowing for memory arrays

Memory array seasoning

Techniques for parallel memory cell access

Input/output line sharing for memory arrays

Code patching for non-volatile memory

Staggered programming for resistive memories

MARTINELLI ANDREA

Electronic device comprising non volatile memory cells and corresponding programming method

Method for programming a memory device suitable to minimize floating gate coupling and memory device

Non volatile memory device architecture and corresponding programming method

Electronic device comprising non volatile memory cells with optimized programming and corresponding programming method

Electronic device comprising non volatile memory cells and corresponding programming method

ST MICROELECTRONICS SRL

Memory device

Redundancy scheme for a memory integrated circuit

LAURENT CHRISTOPHE

Optimized flash memory access method and device

Optimized flash memory access method and device

GOOGLE LLC

User interfaces for refining video group packages

Digital video analysis

MOLLICHELLI MASSIMILIANO

Code patching for non-volatile memory

LODESTAR LICENSING GROUP LLC

Architecture-based power management for a memory device

VIMERCATI DANIELE

Synchronization of operations in distinct memory partitions

BARKLEY GERALD

Staggered programming for resistive memories

ANTARES VISION S P A

Trolley for the dispensing of medicines