Inventor
KRANICH UWE
DE18 patents
⚠️ This page may combine multiple inventors who share the name “KRANICH UWE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ADVANCED MICRO DEVICES INC
13 patentsUS6574725B1Jun 3, 2003
Method and mechanism for speculatively executing threads of instructions
ADVANCED MICRO DEVICES INC145 citations99
US7012604B1Mar 14, 2006
System architecture for high speed ray tracing
ADVANCED MICRO DEVICES INC144 citations98
US6651163B1Nov 18, 2003
Exception handling with reduced overhead in a multithreaded multiprocessing system
ADVANCED MICRO DEVICES INC147 citations98
US6185675B1Feb 6, 2001
Basic block oriented trace cache utilizing a basic block sequence buffer to indicate program order of cached basic blocks
ADVANCED MICRO DEVICES INC121 citations98
US6157996ADec 5, 2000
Processor programably configurable to execute enhanced variable byte length instructions including predicated execution, three operand addressing, and increased register space
ADVANCED MICRO DEVICES INC95 citations98
US6456891B1Sep 24, 2002
System and method for transparent handling of extended register states
ADVANCED MICRO DEVICES INC71 citations96
US6230259B1May 8, 2001
Transparent extended state save
ADVANCED MICRO DEVICES INC55 citations96
US5900022AMay 4, 1999
Apparatus and method for reducing the cache miss penalty in a virtual addressed memory system by using a speculative address generator and an accurate address generator
ADVANCED MICRO DEVICES INC51 citations92
US5850534ADec 15, 1998
Method and apparatus for reducing cache snooping overhead in a multilevel cache system
ADVANCED MICRO DEVICES INC48 citations92
US5524225AJun 4, 1996
Cache system and method for providing software controlled writeback
ADVANCED MICRO DEVICES INC44 citations92
US5761709AJun 2, 1998
Write cache for servicing write requests within a predetermined address range
ADVANCED MICRO DEVICES INC18 citations84
US5752263AMay 12, 1998
Apparatus and method for reducing read miss latency by predicting sequential instruction read-aheads
ADVANCED MICRO DEVICES INC13 citations73
US7689809B2Mar 30, 2010
Transparent return to parallel mode by rampoline instruction subsequent to interrupt processing to accommodate slave processor not supported by operating system
ADVANCED MICRO DEVICES INC2 citations62