Inventor · disambiguated record
Louie Liu
Also filed as: LIU LOUIE · LIU LOUIE XU
14 granted patents·3 pending applications·115 citations·filing 1996–2014
92Inventor score
Files withMICRON TECHNOLOGY INC10TAIWAN SEMICONDUCTOR MFG3COLBY DOUGLAS D1GRACO MINNESOTA INC1LIN TING-YU1
Top patents by PatentIndex Score
17 records- 0182US6432765B1Funnel shaped structure in polysilicon and method of makingMICRON TECHNOLOGY INC·Filed 2000·Granted Aug 13, 2002·18 cites·17 claims
- 0276US5652170AMethod for etching sloped contact openings in polysiliconMICRON TECHNOLOGY INC·Filed 1996·Granted Jul 29, 1997·33 cites·21 claims
- 0373US8800597B2Fine control gas valveCOLBY DOUGLAS D·Filed 2011·Granted Aug 12, 2014·4 cites·27 claims
- 0469US9695945B2Fine control gas valveGRACO MINNESOTA INC·Filed 2014·Granted Jul 4, 2017·2 cites·12 claims
- 0567US6010930AVertically oriented structure with sloped opening and method for etchingMICRON TECHNOLOGY INC·Filed 1997·Granted Jan 4, 2000·21 cites·37 claims
- 0656US6545308B2Funnel shaped structure in polysiliconMICRON TECHNOLOGY INC·Filed 2002·Granted Apr 8, 2003·3 cites·20 claims
- 0754US6975407B1Method of wafer height mappingTAIWAN SEMICONDUCTOR MFG·Filed 2004·Granted Dec 13, 2005·7 cites·12 claims
- 0849US7301604B2Method to predict and identify defocus wafersTAIWAN SEMICONDUCTOR MFG·Filed 2004·Granted Nov 27, 2007·3 cites·19 claims
- 0949US7115492B2Technique for elimination of pitting on silicon substrate during gate stack etch using material in a non-annealed stateMICRON TECHNOLOGY INC·Filed 2003·Granted Oct 3, 2006·3 cites·13 claims
- 1046US6018173AVertically oriented capacitor structure with sloped contact opening and method for etching sloped contact openings in polysiliconMICRON TECHNOLOGY INC·Filed 1997·Granted Jan 25, 2000·8 cites·32 claims
- 1145US6613673B2Technique for elimination of pitting on silicon substrate during gate stack etchMICRON TECHNOLOGY INC·Filed 2001·Granted Sep 2, 2003·2 cites·9 claims
- 1239US2006000109A1Method and apparatus for reducing spin-induced wafer chargingTAIWAN SEMICONDUCTOR MFG·Filed 2004·Application pending·0 cites
- 1338US7078342B1Method of forming a gate stackMICRON TECHNOLOGY INC·Filed 1998·Granted Jul 18, 2006·6 cites·10 claims
- 1438US6087254ATechnique for elimination of pitting on silicon substrate during gate stack etchMICRON TECHNOLOGY INC·Filed 1996·Granted Jul 11, 2000·5 cites·29 claims
- 1537US7041548B1Methods of forming a gate stack that is void of silicon clusters within a metallic silicide film thereofMICRON TECHNOLOGY INC·Filed 2000·Granted May 9, 2006·0 cites·12 claims
- 1637US2005248754A1Wafer aligner with WEE (water edge exposure) functionWANG CHUN-SHENG·Filed 2004·Application pending·0 cites
- 1733US2006201848A1Method for reducing mask precipitation defectsLIN TING-YU·Filed 2005·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →