Inventor

MCELVAIN KENNETH S

US105 patents

⚠️ This page may combine multiple inventors who share the name “MCELVAIN KENNETH S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MCELVAIN KENNETH S

SYNPLICITY INC

Methods and apparatuses for designing integrated circuits

Methods and apparatuses for thermal analysis based circuit design

Circuits with modular redundancy and methods and apparatuses for their automated synthesis

Method and apparatus for automated synthesis of multi-channel circuits

Methods and apparatuses for designing integrated circuits

Maintaining correspondence between text and schematic representations of circuit elements in circuit synthesis

Hardware/software co-debugging in a hardware description language

Methods and apparatuses for transient analyses of circuits

Methods and apparatuses for designing integrated circuits

Method and apparatus for invalid state detection

Methods and apparatuses for automatic extraction of finite state machines

Method and apparatus for circuit partitioning and trace assignment in circuit design

Methods and apparatuses for designing integrated circuits using automatic reallocation techniques

Method and apparatus for automated circuit design

Methods and apparatuses for designing integrated circuits

Reducing clock skew in clock gating circuits

Methods and apparatuses for designing integrated circuits

Method and apparatus for the design and analysis of digital circuits with time division multiplexing

Method and apparatus for invalid state detection

Reducing clock skew in clock gating circuits

Method and system for debugging using replicated logic

Methods and apparatuses for non-equivalence checking of circuits with subspace

Transforming a circuit having loop structure and tri-state element using replication

Method and apparatus for automated circuit design

Method and apparatus for resetable memory and design approach for same

Method and apparatus to estimate delay for logic circuit optimization

Method and apparatus for placement and routing cells on integrated circuit chips

Methods and apparatuses for checking equivalence of circuits

Verification of digital circuitry using range generators

SYNOPSYS INC

Enhanced hardware debugging with embedded FPGAS in a hardware description language

Methods and apparatuses to generate a shielding mesh for integrated circuit devices

Integrated circuit devices and methods and apparatuses for designing integrated circuit devices

Interconnection device in a multi-layer shielding mesh

Method and apparatus to design an interconnection device in a multi-layer shielding mesh

Methods and apparatuses for thermal analysis based circuit design

Methods and apparatuses for transient analyses of circuits

Methods and apparatuses for reset conditioning in integrated circuits

Method and system for debugging using replicated logic and trigger logic

Methods and apparatuses for designing integrated circuits (ICs) with optimization at register transfer level (RTL) amongst multiple ICs

Circuit partitioning and trace assignment in circuit design

Techniques for use with automated circuit design and simulations

Method and apparatus for determining a phase relationship between asynchronous clock signals

Method and apparatus for circuit partitioning and trace assignment in circuit design

Architectural physical synthesis

MCELVAIN KENNETH S

Integrated circuit devices and methods and apparatuses for designing integrated circuit devices

Licensing programmable hardware sub-designs using a host-identifier

Integrated circuit devices and methods and apparatuses for designing integrated circuit devices

Integrated circuit devices and methods and apparatuses for designing integrated circuit devices

Shielding mesh design for an integrated circuit device

PANDEY AWARTIKA

Method and apparatus for circuit partitioning and trace assignment in circuit design