Inventor
MERILO DIOSCORO A
SG60 patents
⚠️ This page may combine multiple inventors who share the name “MERILO DIOSCORO A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
STATS CHIPPAC LTD
19 patentsUS7385299B2Jun 10, 2008
Stackable integrated circuit package system with multiple interconnect interface
STATS CHIPPAC LTD31 citations93
US7964450B2Jun 21, 2011
Wirebondless wafer level package with plated bumps and interconnects
STATS CHIPPAC LTD22 citations92
US7830020B2Nov 9, 2010
Integrated circuit package system employing device stacking
STATS CHIPPAC LTD19 citations92
US7535086B2May 19, 2009
Integrated circuit package-on-package stacking system
STATS CHIPPAC LTD34 citations92
US9589910B2Mar 7, 2017
Semiconductor device and method of forming base leads from base substrate as standoff for stacking semiconductor die
STATS CHIPPAC LTD7 citations84
US8866275B2Oct 21, 2014
Leadframe interposer over semiconductor die and TSV substrate for vertical electrical interconnect
STATS CHIPPAC LTD8 citations84
US8377750B2Feb 19, 2013
Integrated circuit packaging system with multiple row leads and method of manufacture thereof
STATS CHIPPAC LTD14 citations84
US7986043B2Jul 26, 2011
Integrated circuit package on package system
STATS CHIPPAC LTD11 citations84
US7859098B2Dec 28, 2010
Embedded integrated circuit package system
STATS CHIPPAC LTD8 citations84
US7709944B2May 4, 2010
Integrated circuit package system with package integration
STATS CHIPPAC LTD16 citations84
US7911067B2Mar 22, 2011
Semiconductor package system with die support pad
STATS CHIPPAC LTD6 citations74
US9337161B2May 10, 2016
Integrated circuit package system with removable backing element having plated terminal leads and method of manufacture thereof
STATS CHIPPAC LTD4 citations73
US7718472B2May 18, 2010
Integrated circuit package-on-package stacking system and method of manufacture thereof
STATS CHIPPAC LTD5 citations73
US7985628B2Jul 26, 2011
Integrated circuit package system with interconnect lock
STATS CHIPPAC LTD6 citations63
US7777320B2Aug 17, 2010
Quad flat pack in quad flat pack integrated circuit package system
STATS CHIPPAC LTD4 citations63
US7741707B2Jun 22, 2010
Stackable integrated circuit package system
STATS CHIPPAC LTD4 citations63
US7868434B2Jan 11, 2011
Integrated circuit package-on-package stacking system
STATS CHIPPAC LTD3 citations62
US7981702B2Jul 19, 2011
Integrated circuit package in package system
STATS CHIPPAC LTD5 citations59
US9666540B2May 30, 2017
Semiconductor device and method of forming prefabricated heat spreader frame with embedded semiconductor die
STATS CHIPPAC LTD0 citations52
CAMACHO ZIGMUND R
11 patentsUS8993376B2Mar 31, 2015
Semiconductor device and method of forming wafer-level multi-row etched leadframe with base leads and embedded semiconductor die
CAMACHO ZIGMUND R52 citations98
US8409922B2Apr 2, 2013
Semiconductor device and method of forming leadframe interposer over semiconductor die and TSV substrate for vertical electrical interconnect
CAMACHO ZIGMUND R58 citations98
US8076184B1Dec 13, 2011
Semiconductor device and method of forming wafer-level multi-row etched leadframe with base leads and embedded semiconductor die
CAMACHO ZIGMUND R43 citations94
US8241956B2Aug 14, 2012
Semiconductor device and method of forming wafer level multi-row etched lead package
CAMACHO ZIGMUND R25 citations92
US9922955B2Mar 20, 2018
Semiconductor device and method of forming package-on-package structure electrically interconnected through TSV in WLCSP
CAMACHO ZIGMUND R9 citations84
US8241954B2Aug 14, 2012
Wafer level die integration and method
CAMACHO ZIGMUND R9 citations84
US8105915B2Jan 31, 2012
Semiconductor device and method of forming vertical interconnect structure between non-linear portions of conductive layers
CAMACHO ZIGMUND R12 citations83
US9142514B2Sep 22, 2015
Semiconductor device and method of forming wafer level die integration
CAMACHO ZIGMUND R4 citations73
US8722457B2May 13, 2014
System and apparatus for wafer level integration of components
CAMACHO ZIGMUND R6 citations73
US8546189B2Oct 1, 2013
Semiconductor device and method of forming a wafer level package with top and bottom solder bump interconnection
CAMACHO ZIGMUND R4 citations63
US8502376B2Aug 6, 2013
Wirebondless wafer level package with plated bumps and interconnects
CAMACHO ZIGMUND R3 citations63
PAGAILA REZA A
5 patentsUS9406619B2Aug 2, 2016
Semiconductor device including pre-fabricated shielding frame disposed over semiconductor die
PAGAILA REZA A46 citations98
US8263434B2Sep 11, 2012
Semiconductor device and method of mounting die with TSV in cavity of substrate for electrical interconnect of Fi-PoP
PAGAILA REZA A110 citations98
US8435835B2May 7, 2013
Semiconductor device and method of forming base leads from base substrate as standoff for stacking semiconductor die
PAGAILA REZA A33 citations93
US8097489B2Jan 17, 2012
Semiconductor device and method of mounting pre-fabricated shielding frame over semiconductor die
PAGAILA REZA A36 citations93
US8525344B2Sep 3, 2013
Semiconductor device and method of forming bond wires between semiconductor die contact pads and conductive TOV in peripheral area around semiconductor die
PAGAILA REZA A9 citations84
CAMACHO ZIGMUND RAMIREZ
4 patentsUS8723324B2May 13, 2014
Integrated circuit packaging system with pad connection and method of manufacture thereof
CAMACHO ZIGMUND RAMIREZ2 citations63
US8617933B2Dec 31, 2013
Integrated circuit packaging system with interlock and method of manufacture thereof
CAMACHO ZIGMUND RAMIREZ4 citations63
US8216883B2Jul 10, 2012
Method for manufacturing semiconductor package system with die support pad
CAMACHO ZIGMUND RAMIREZ3 citations63
US8212342B2Jul 3, 2012
Integrated circuit package system with removable backing element having plated terminal leads and method of manufacture thereof
CAMACHO ZIGMUND RAMIREZ2 citations63
CHOW SENG GUAN
2 patentsPAGAILA REZA ARGENTY
2 patentsKUAN HEAP HOE
2 patentsST ASSEMBLY TEST SERVICES LTD
1 patentST ASSEMBLY TEST SERVICES PTE LTD
1 patentBATHAN HENRY DESCALZO
1 patentONG YOU YANG
1 patentDAHILIG FREDERICK R
1 patentShowing the top 50 of 60 patents by PatentIndex Score.