Inventor

KADOSH AVIRAN

IL42 patents

⚠️ This page may combine multiple inventors who share the name “KADOSH AVIRAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KADOSH AVIRAN

CISCO TECH INC

Network traffic load balancing

Priority-based flow control messaging for port extender

Distributed meters and statistical meters

Network traffic load balancing

Effective seeding of CRC functions for flows&#39; path polarization prevention in networks

Priority-based flow control messaging for port extender

Symbol multiplexing physical medium attachment (PMA)

Systems and methods of inserting idles within packets to reduce latency

Statistical packet and byte counters

Network traffic load balancing

Flow rate based network load balancing

Effective seeding of CRC functions for flows&#39; path polarization prevention in networks

On-demand and secure hardware license-based SKU creation for ASICs

MARVELL ISRAEL (M I S L) LTD

Method and apparatus for storing packets in a network device

Dynamic load balancing switch architecture

Methods and apparatus for memory resource management in a network device

Efficient content addressable memory (CAM) architecture

Systems and methods for shared pipeline architectures having minimalized delay

Switch device having a plurality of processing cores

Methods and network device for oversubscription handling

MARVELL ISRAEL MISL LTD

Efficient management of queueing resources for switches

Apparatus for determining locations of fields in a data unit

Methods and apparatus for memory resource management in a network device

Hash computation for network switches

Methods for reassembling fragmented data units

Methods and apparatus for memory resource management in a network device

KADOSH AVIRAN

Method and apparatus for reducing power consumption in a digital circuit by controlling the clock

Apparatus for reassembling a fragmented data unit and transmitting the reassembled data unit

Hardware interface utilizing alignment symbols for demultiplexing

Method and apparatus for reducing power consumption in a digital circuit by controlling the clock

Key selection device and process for content-addressable memory

MARVELL WORLD TRADE LTD

Multi-stage interconnect network in a parallel processing network device

Cut-through processing for slow and fast ports

Cut-through processing for slow and fast ports

MARVELL INT LTD

Switch device having a plurality of processing cores

Switch device having a plurality of processing cores

ARAD CARMI

Enhanced tail dropping in a switch

REVAH YORAM

Dynamic load balancing switch architecture

MIZRAHI TAL

Hash computation for network switches

BROADCOM CORP

Method and apparatus for reducing power consumption in a digital circuit by controlling the clock

KOPELMAN YANIV

Method and apparatus for determining locations of fields in a data unit

MARVELL SEMICONDUCTOR ISRAEL

Lock phase circuit

Effective seeding of CRC functions for flows' path polarization prevention in networks

Effective seeding of CRC functions for flows' path polarization prevention in networks