Inventor

KESIRAJU ADITYA

US22 patents

⚠️ This page may combine multiple inventors who share the name “KESIRAJU ADITYA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KESIRAJU ADITYA

APPLE INC

Coprocessor context priority

Load-store unit with banked queue

Coprocessors with bypass optimization, variable grid architecture, and fused vector operations

Coprocessor synchronizing instruction suppression

Coprocessor memory ordering table

Coprocessor memory ordering table

Coprocessor operation bundling

Coprocessor operation bundling

Coprocessor operation bundling

Coprocessors with bypass optimization, variable grid architecture, and fused vector operations

Coprocessor context priority

Coprocessors with bypass optimization, variable grid architecture, and fused vector operations

Coprocessor synchronizing instruction suppression

Operation processing controlled according to difference in current consumption

Coprocessor register renaming using registers associated with an inactive context to store results from an active context

Processor with multiple load queues including a queue to manage ordering and a queue to manage replay

Hardware compression and decompression engine

Branch resolve pointer optimization

Coprocessor with distributed register

INTEL CORP

Memory fault suppression via re-execution and hardware FSM

Resolving memory accesses crossing cache line boundaries

Scalable event handling in multi-threaded processor cores