Inventor
BAIR OWEN S
US9 patents
Patents
9 patentsUS5933356AAug 3, 1999
Method and system for creating and verifying structural logic model of electronic design from behavioral description, including generation of logic and timing models
LSI LOGIC CORP263 citations99
US5572437ANov 5, 1996
Method and system for creating and verifying structural logic model of electronic design from behavioral description, including generation of logic and timing models
LSI LOGIC CORP149 citations99
US5278769AJan 11, 1994
Automatic logic model generation from schematic data base
LSI LOGIC CORP143 citations98
US5577050ANov 19, 1996
Method and apparatus for configurable build-in self-repairing of ASIC memories design
LSI LOGIC CORP156 citations96
US5764878AJun 9, 1998
Built-in self repair system for embedded memories
LSI LOGIC CORP138 citations95
US5463563AOct 31, 1995
Automatic logic model generation from schematic data base
LSI LOGIC CORP70 citations95
US5898595AApr 27, 1999
Automated generation of megacells in an integrated circuit design system
LSI LOGIC CORP79 citations91
US6065134AMay 16, 2000
Method for repairing an ASIC memory with redundancy row and input/output lines
LSI LOGIC CORP52 citations90
US6066178AMay 23, 2000
Automated design method and system for synthesizing digital multipliers
LSI LOGIC CORP38 citations86