Inventor

HO TZONG-DA

TW28 patents

⚠️ This page may combine multiple inventors who share the name “HO TZONG-DA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HO TZONG-DA

SILICONWARE PRECISION INDUSTRIES CO LTD

Method of making semiconductor package with heat spreader

Externally-embedded heat-dissipating device for ball grid array integrated circuit package

Semiconductor package with embedded heat-dissipating device

Method of achieving solder ball coplanarity on ball grid array integrated circuit package

Ball grid array integrated circuit package structure

Ball-grid array integrated circuit package with an embedded type of heat-dissipation structure and method of manufacturing the same

Semicondctor package

Fabricating method for semiconductor package

Semiconductor package with heat sink

Semiconductor package with stacked chips

Cavity-down tape ball grid array package assembly with grounded heat sink and method of fabricating the same

Method of fabricating a flip-chip ball-grid-array package with molded underfill

Layout method for thin and fine ball grid array package substrate with plating bus

Stacked multi-chip package structure with on-chip integration of passive component

Method of fabricating a ball grid array integrated circuit package having an encapsulating body

Substrate of semiconductor package

Fabrication method of semiconductor package with heat sink

Flash-preventing semiconductor package

Semiconductor package based on window pad type of leadframe and method of fabricating the same

Method of making semiconductor package with heat spreader

Semiconductor package with crack-preventing member

Quad flat non-leaded semiconductor package and method of fabricating the same

Layout method for thin and fine ball grid array package substrate with plating bus

Ball grid array package with interdigitated power ring and ground ring

Semiconductor package with stacked chips

Substrate of semiconductor package

Ball grid array substrate strip with warpage-preventive linkage structure

(unassigned)

Method of breaking electrically conductive traces on substrate into open-circuited state