Inventor

NATU MAHESH S

US44 patents

⚠️ This page may combine multiple inventors who share the name “NATU MAHESH S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

NATU MAHESH S

INTEL CORP

System for configuring a computer with or without an operating system to allow another computer to remotely exchange data and control the computer

Secure method to perform computer system firmware updates

Controlling memory redundancy in a system

System and method to enable platform personality migration

Method for sharing a device for non-operating system uses by generating a false remove signal to divert the device into a sleep state

Redirecting memory accesses for headless systems

Secure tunneling access to debug test ports on non-volatile memory storage units

System and method to seamlessly enable enhanced management and scripting of a computer system and its add-in devices

System and method for configuring hardware devices using a menu for platforms with EFI and legacy option-ROMs

Parameter exchange for a die-to-die interconnect

System processing data packets received from remote host to control system operation according to adjustable timer interrupts based on data flow rate

Methods and apparatus to enable console redirection in a multiple execution environment

Console redirection system for remotely controlling operation of devices on a host computer if data packet has been received during a time interval

Executing large device firmware programs

Global persistent flush

Boot process with parallel memory initialization

Layered virtual machine integrity monitoring

Host-managed coherent device memory

Allocating and configuring persistent memory

Allocating and configuring persistent memory

Memory control management of a processor

Method and apparatus to support legacy master boot record (MBR) partitions

System, method, apparatus and architecture for dynamically configuring device fabrics

Global persistent flush

Control logic and methods to map host-managed device memory to a system address space

Systems and devices having a scalable basic input/output system (BIOS) footprint and associated methods

Secure tunneling access to debug test ports on non-volatile memory storage units

Method for sharing host processor for non-operating system uses by generating a false remove signal

Method and apparatus to support legacy master boot record (MBR) partitions

Layered virtual machine integrity monitoring

Hardware protection of virtual machine monitor runtime integrity watcher

Selective memory mode authorization enforcement

Logging errors in error handling devices in a system

NATU MAHESH S

Monitoring resource usage by a virtual machine

Enabling storage of active state in internal storage of processor rather than in SMRAM upon entry to system management mode

Mechanism for detecting a no-processor swap condition and modification of high speed bus calibration during boot

Supporting advanced RAS features in a secured computing system

Security management in multi-node, multi-processor platforms

DATTA SHAMANNA M

Methods and apparatuses for recovering usage of trusted platform module

Processor that detects when system management mode attempts to reach program code outside of protected space

Hardware protection of virtual machine monitor runtime integrity watcher

SWANSON ROBERT C

Controlling memory redundancy in a system

Initialization trace of a computing device

CHANG LUKE

Tunneling platform management messages through inter-processor interconnects