Inventor

YEH DER-CHYANG

TW256 patents

⚠️ This page may combine multiple inventors who share the name “YEH DER-CHYANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YEH DER-CHYANG

TAIWAN SEMICONDUCTOR MFG CO LTD

Semiconductor package and method of forming the same

Package structure and method of forming the same

Dummy features in redistribution layers (RDLS) and methods of forming same

Integrated circuit package pad and methods of forming

Semiconductor package and method of forming the same

Redistribution layers in semiconductor packages and methods of forming same

Multi-chip structure and method of forming same

Electric magnetic shielding structure in packages

Packages and packaging methods for semiconductor devices, and packaged semiconductor devices

Devices employing thermal and mechanical enhanced layers and methods of forming same

Wafer level chip scale packaging intermediate structure apparatus and method

Integrated fan-out packages and methods of forming the same

Interconnect structure for package-on-package devices and a method of fabricating

Semiconductor devices, method for fabricating integrated fan-out packages, and method for fabricating semiconductor devices

Alignment mark design for packages

Packages and methods of forming packages

Semiconductor device and manufacturing method thereof

Dummy metal with zigzagged edges

Interconnect structure for package-on-package devices and a method of fabricating

Integrated circuit package pad and methods of forming

Package with metal-insulator-metal capacitor and method of manufacturing the same

Redistribution layers in semiconductor packages and methods of forming same

Package with bridge die for interconnection and method forming same

Package structure, die and method of manufacturing the same

Package structure including a first die and a second die and a bridge die and method of forming the package structure

Method for dicing integrated fan-out packages without seal rings

Semiconductor structure

Interconnect structure for package-on-package devices

Devices employing thermal and mechanical enhanced layers and methods of forming same

Wafer level chip scale packaging intermediate structure apparatus and method

Semiconductor packages with thermal-electrical-mechanical chips and methods of forming the same

Package structure and manufacturing method thereof

Semiconductor packages and methods of forming same

Interconnect structure for package-on-package devices

Semiconductor structure and manufacturing method thereof

Redistribution layers in semiconductor packages and methods of forming same

Multi-stacked package-on-package structures

TAIWAN SEMICONDUCTOR MFG

Package with metal-insulator-metal capacitor and method of manufacturing the same

Method of fabricating interconnect structure for package-on-package devices

Structure and method for 3D IC package

Fan-out package structure and methods for forming the same

Chip on package structure and method

Semiconductor package including an embedded surface mount device and method of forming the same

Multi-chip structure and method of forming same

YU CHEN-HUA

Methods and apparatus of wafer level package for heterogeneous integration technology

Packages with passive devices and methods of forming the same

Interposer system and method

CHEN SHUO-MAO

Package with passive devices and method of forming the same

Chen shuo mao

Package with metal-insulator-metal capacitor and method of manufacturing the same

WANG CHUEI-TANG

EMI package and method for making same