Inventor

YEH CHIUNG-HAN

TW41 patents

⚠️ This page may combine multiple inventors who share the name “YEH CHIUNG-HAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YEH CHIUNG-HAN

TAIWAN SEMICONDUCTOR MFG CO LTD

Interconnect structure for package-on-package devices and a method of fabricating

Interconnect structure for package-on-package devices and a method of fabricating

Package with metal-insulator-metal capacitor and method of manufacturing the same

Interconnect structure for package-on-package devices

Interconnect structure for package-on-package devices

Interconnect structure for package-on-package devices

Package with metal-insulator-metal capacitor and method of manufacturing the same

Polysilicon design for replacement gate technology

Polysilicon design for replacement gate technology

Package with metal-insulator-metal capacitor and method of manufacturing the same

Polysilicon design for replacement gate technology

Polysilicon design for replacement gate technology

Polysilicon design for replacement gate technology

Polysilicon design for replacement gate technology

Polysilicon design for replacement gate technology

Package with metal-insulator-metal capacitor and method of manufacturing the same

Package with metal-insulator-metal capacitor and method of manufacturing the same

Integrated circuit metal gate structure having tapered profile

TAIWAN SEMICONDUCTOR MFG

Package with metal-insulator-metal capacitor and method of manufacturing the same

Method of fabricating interconnect structure for package-on-package devices

Integrating a first contact structure in a gate last process

Photoresist etch back method for gate last process

Packages with passive devices and methods of forming the same

Spacer shape engineering for void-free gap-filling process

Method for tuning a work function of high-k metal gate devices

Dishing-free gap-filling with multiple CMPs

Photo alignment mark for a gate last process

Integrating a first contact structure in a gate last process

YEH CHIUNG-HAN

Method for tuning a work function of high-K metal gate devices

Integrating a first contact structure in a gate last process

Integrating a first contact structure in a gate last process

CHUANG HARRY HAK-LAY

Polysilicon design for replacement gate technology

Gate stack for high-K/metal gate last process

CHUANG HARRY

Integrated circuit metal gate structure and method of fabrication

Device layout for gate last process

LAI SU-CHEN

Method of fabricating a dummy gate structure in a gate last process

Dummy gate structure for gate last process

YU CHEN-HUA

Packages with passive devices and methods of forming the same

Chen shuo mao

Package with metal-insulator-metal capacitor and method of manufacturing the same

SHEN GARY

Photo alignment mark for a gate last process

WU MING-YUAN

Spacer shape engineering for void-free gap-filling process