Inventor

POTHUKUCHI SRI HARSHA

US4 patents

⚠️ This page may combine multiple inventors who share the name “POTHUKUCHI SRI HARSHA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JPMORGAN CHASE BANK NA

3 patents

US11902469B1Feb 13, 2024

Method for managing call queues for recurring customer questions

JPMORGAN CHASE BANK NA1 citations54

US12592996B2Mar 31, 2026

Method and system for estimating call urgency for improved call queue management

JPMORGAN CHASE BANK NA0 citations43

US12587599B2Mar 24, 2026

Method and system for estimating call durations for improved call queue management

JPMORGAN CHASE BANK NA0 citations43

CADENCE DESIGN SYSTEMS INC

1 patent

US11003821B1May 11, 2021

Deterministic loop breaking in multi-mode multi-corner static timing analysis of integrated circuits

CADENCE DESIGN SYSTEMS INC6 citations68