Inventor

HARAGUCHI MASARU

JP30 patents

⚠️ This page may combine multiple inventors who share the name “HARAGUCHI MASARU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HARAGUCHI MASARU

RENESAS TECH CORP

Interface circuit

Semiconductor memory device storing redundant replacement information with small occupation area

Test circuit capable of testing embedded memory with reliability

Semiconductor memory device with common I/O type circuit configuration achieving write before sense operation

Semiconductor memory device storing redundant replacement information with small occupation area

Semiconductor memory device with read and/or write column select gate

Circuit for reducing test time and semiconductor memory device including the circuit

Semiconductor test circuit for testing a semiconductor memory device having a write mask function

Semiconductor device and impedance adjusting method thereof

Semiconductor memory device with power consumption reduced in non-data-access

MITSUBISHI ELECTRIC CORP

Semiconductor device

Test circuit device capable of identifying error in stored data at memory cell level and semiconductor integrated circuit device including the same

Semiconductor memory device

Semiconductor memory device

Synchronous semiconductor integrated circuit capable of improving immunity from malfunctions

Semiconductor memory device having write column select gate

AP MEMORY TECH CORP

Circuit assembly

Circuit assembly

Capacitor device and manufacturing method therefor

Circuit system having compact decoupling structure

ZENTEL JAPAN CORP

Semiconductor memory device for preventing occurrence of row hammer issue

Capacitor device and manufacturing method therefor

Semiconductor memory device

Semiconductor memory device comprising an interface conforming to JEDEC standard and control device therefor

RENESAS ELECTRONICS CORP

Semiconductor device which transmits or receives a signal to or from an external memory by a DDR system

Data processing system, microcontroller and semiconductor device

Data processing system with selective engagement of standby mode based on comparison with a break-even time

AP MEMORY TECH CORPORATION

Method for manufacturing semiconductor structure

TAIWAN SEMICONDUCTOR MFG CO LTD

Drive circuit with improved timing margin for memory device

MURATA KAN

Data processing device and data processing method thereof