Inventor

SHEPPARD SCOTT T

US33 patents

⚠️ This page may combine multiple inventors who share the name “SHEPPARD SCOTT T”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHEPPARD SCOTT T

CREE INC

Methods of fabricating transistors including dielectrically-supported gate electrodes and related devices

Nitride-based transistors with a protective layer and a low-damage recess

Integrated nitride and silicon carbide-based devices

Methods of fabricating transistors including dielectrically-supported gate electrodes

Methods of fabricating transistors including supported gate electrodes

Nitride-based transistors with a protective layer and a low-damage recess and methods of fabrication thereof

Nitride-based transistors and methods of fabrication thereof using non-etched contact recesses

Transistors including supported gate electrodes

Methods of manufacturing group III nitride semiconductor devices with silicon nitride layers

High temperature ion implantation of nitride based HEMTs

Cap layers including aluminum nitride for nitride-based transistors

Nitride-based transistors and methods of fabrication thereof using non-etched contact recesses

Group III nitride field effect transistors (FETS) capable of withstanding high temperature reverse bias test conditions

Dielectric passivation for semiconductor devices

Passivation of wide band-gap based semiconductor devices with hydrogen-free sputtered nitrides

Semiconductor devices including implanted regions and protective layers and methods of forming the same

Methods of fabricating semiconductor devices including implanted regions for providing low-resistance contact to buried layers and related devices

Integrated nitride and silicon carbide-based devices

Integrated nitride and silicon carbide-based devices and methods of fabricating integrated nitride-based devices

Methods of fabricating nitride-based transistors with an ETCH stop layer

Methods of fabricating thick semi-insulating or insulating epitaxial gallium nitride layers

SHEPPARD SCOTT T

Semiconductor devices including implanted regions for providing low-resistance contact to buried layers and related devices

Methods of forming group III-nitride semiconductor devices including implanting ions directly into source and drain regions and annealing to activate the implanted ions

Semiconductor devices including implanted regions and protective layers

Nitride-based transistors with a protective layer and a low-damage recess

Integrated nitride and silicon carbide-based devices

SMITH RICHARD PETER

Group III nitride field effect transistors (FETS) capable of withstanding high temperature reverse bias test conditions

Group III nitride field effect transistors (FETS) capable of withstanding high temperature reverse bias test conditions

SAXLER ADAM WILLIAM

Devices having thick semi-insulating epitaxial gallium nitride layer

Group III nitride semiconductor devices with silicon nitride layers and methods of manufacturing such devices

DAIMLER CHRYSLER AG

Semiconductor component with foreign atoms introduced by ion implantation and process for producing the same

SMITH R PETER

Methods of fabricating transistors including self-aligned gate electrodes and source/drain regions

MACOM TECH SOLUTIONS HOLDINGS INC

Field effect transistor with stacked unit subcell structure