Inventor

BANDYOPADHYAY ABHIJIT

US29 patents

⚠️ This page may combine multiple inventors who share the name “BANDYOPADHYAY ABHIJIT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BANDYOPADHYAY ABHIJIT

SANDISK 3D LLC

Highly scalable thin film transistor

Method of operating FET low current 3D re-ram

Method of operating FET low current 3D Re-RAM

Alternating bipolar forming voltage for resistivity-switching elements

Transistor layout configuration for tight-pitched memory array lines

Dielectric-based memory cells having multi-level one-time programmable and bi-level rewriteable operating modes and methods of forming the same

Resistive random access memory containing a steering element and a tunneling dielectric element

Nonvolatile memory cell operating by increasing order in polycrystalline semiconductor material

High endurance non-volatile storage

SANDISK TECHNOLOGIES LLC

Three-dimensional memory device with vertical semiconductor bit lines located in recesses and method of making thereof

Magnetoelectric random access memory array and methods of operating the same

Multi-gate vertical field effect transistor with channel strips laterally confined by gate dielectric layers, and method of making thereof

Three terminal isolation elements and methods

Three terminal isolation elements and methods

Methods and apparatus for three-dimensional nonvolatile memory

BANDYOPADHYAY ABHIJIT

3D polysilicon diode with low contact resistance and method for forming same

Carbon/tunneling-barrier/carbon diode

3D polysilicon diode with low contact resistance and method for forming same

CHEN XIYING

In-situ passivation methods to improve performance of polysilicon diode

Soft forming reversible resistivity-switching element for bipolar switching

HERNER S BRAD

Nonvolatile memory cell operating by increasing order in polycrystalline semiconductor material

Nonvolatile memory cell operating by increasing order in polycrystalline semiconductor material

MATRIX SEMICONDUCTOR INC

Transistor layout configuration for tight-pitched memory array lines

XIAO LI

Resistive random access memory with low current operation

KREUPL FRANZ

Composition of memory cell with resistance-switching layers

MAXWELL STEVEN

Diodes with native oxide regions for use in memory arrays and methods of forming the same

INST OF MICROELECTRONICS

High speed, low cost BICMOS process using profile engineering

COSTA XIYING CHEN

Step soft program for reversible resistivity-switching elements

COSTA XIYING

Counter doping compensation methods to improve diode performance