Inventor
PIPER DANIEL
US17 patents
⚠️ This page may combine multiple inventors who share the name “PIPER DANIEL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
10 patentsUS10242951B1Mar 26, 2019
Optical electronic-chip identification writer using dummy C4 bumps
IBM8 citations82
US10415721B2Sep 17, 2019
Micro electrical mechanical system (MEMS) valve
IBM2 citations71
US11056439B2Jul 6, 2021
Optical chip ID definition using nanoimprint lithography
IBM0 citations61
US10453800B1Oct 22, 2019
Optical chip ID definition using nanoimprint lithography
IBM1 citations61
US11187349B2Nov 30, 2021
Micro electrical mechanical system (MEMS) valve
IBM0 citations60
US11161110B2Nov 2, 2021
MEMS optical liquid level sensor
IBM0 citations50
US10898871B2Jan 26, 2021
Micro electrical mechanical system (MEMS) multiplexing mixing
IBM0 citations50
US10551240B2Feb 4, 2020
Self-cleaning liquid level sensor
IBM0 citations50
US10458909B1Oct 29, 2019
MEMS optical sensor
IBM0 citations50
US10612691B2Apr 7, 2020
Micro electrical mechanical system (MEMS) valve
IBM0 citations39
PIPER DANIEL
4 patentsUS8546250B2Oct 1, 2013
Method of fabricating vertical integrated semiconductor device with multiple continuous single crystal silicon layers vertically separated from one another
PIPER DANIEL6 citations81
US9252202B2Feb 2, 2016
Test structure and method for determining overlay accuracy in semiconductor devices using resistance measurement
PIPER DANIEL3 citations70
US8530327B2Sep 10, 2013
Nitride shallow trench isolation (STI) structures and methods for forming the same
PIPER DANIEL4 citations57
US9035418B2May 19, 2015
Nitride shallow trench isolation (STI) structures
PIPER DANIEL0 citations46
WAFERTECH LLC
3 patentsUS7631286B2Dec 8, 2009
Automated metrology recipe generation
WAFERTECH LLC6 citations60
US9564382B2Feb 7, 2017
Test structure for determining overlay accuracy in semiconductor devices using resistance measurement
WAFERTECH LLC0 citations51
US8841676B2Sep 23, 2014
Vertical integrated semiconductor device with multiple continuous single crystal silicon layers vertically separated from one another
WAFERTECH LLC1 citations51