Inventor
CHIANG DAVID
US121 patents
⚠️ This page may combine multiple inventors who share the name “CHIANG DAVID”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
XILINX INC
21 patentsUS5486776AJan 23, 1996
Antifuse-based programmable logic circuit
XILINX INC173 citations99
US5898602AApr 27, 1999
Carry chain circuit with flexible carry function for implementing arithmetic and logical functions
XILINX INC184 citations98
US5357153AOct 18, 1994
Macrocell with product-term cascade and improved flip flop utilization
XILINX INC205 citations98
US5506878AApr 9, 1996
Programmable clock having programmable delay and duty cycle based on a user-supplied reference clock
XILINX INC78 citations96
US5362999ANov 8, 1994
EPLD chip with hybrid architecture optimized for both speed and flexibility
XILINX INC50 citations96
US5784577AJul 21, 1998
Automated control system for programming PLDs
XILINX INC33 citations93
US5506518AApr 9, 1996
Antifuse-based programmable logic circuit
XILINX INC30 citations93
US5483478AJan 9, 1996
Method and structure for reducing carry delay for a programmable carry chain
XILINX INC47 citations93
US5448181ASep 5, 1995
Output buffer circuit having reduced switching noise
XILINX INC22 citations93
US5332929AJul 26, 1994
Power management for programmable logic devices
XILINX INC37 citations93
US5329174AJul 12, 1994
Circuit for forcing known voltage on unconnected pads of an integrated circuit
XILINX INC49 citations93
US5764076AJun 9, 1998
Circuit for partially reprogramming an operational programmable logic device
XILINX INC40 citations92
US5742178AApr 21, 1998
Programmable voltage stabilizing circuit for a programmable integrated circuit device
XILINX INC33 citations92
US5570051AOct 29, 1996
Multiplexed by-passable memory devices with increased speed and improved flip-flop utilization
XILINX INC22 citations92
US5530378AJun 25, 1996
Cross point interconnect structure with reduced area
XILINX INC43 citations92
US5302866AApr 12, 1994
Input circuit block and method for PLDs with register clock enable selection
XILINX INC33 citations92
US5349249ASep 20, 1994
Programmable logic device having security elements located amongst configuration bit location to prevent unauthorized reading
XILINX INC52 citations91
US6172519B1Jan 9, 2001
Bus-hold circuit having a defined state during set-up of an in-system programmable device
XILINX INC17 citations83
US5565792AOct 15, 1996
Macrocell with product-term cascade and improved flip flop utilization
XILINX INC14 citations81
US6018250AJan 25, 2000
Programming method to enable system recovery after power failure
XILINX INC9 citations74
US5450021ASep 12, 1995
EPLD chip with hybrid architecture optimized for both speed and flexibility
XILINX INC9 citations74
VERIZON PATENT & LICENSING INC
6 patentsUS9796391B2Oct 24, 2017
Distracted driver prevention systems and methods
VERIZON PATENT & LICENSING INC13 citations82
US11477808B2Oct 18, 2022
System and method for low latency integrated access and backhaul
VERIZON PATENT & LICENSING INC2 citations73
US10790897B1Sep 29, 2020
Systems and methods for selecting radio beams
VERIZON PATENT & LICENSING INC4 citations73
US9972324B2May 15, 2018
Personal assistant application
VERIZON PATENT & LICENSING INC4 citations73
US9338085B2May 10, 2016
Smart mobility management entity for UE attached relay node
VERIZON PATENT & LICENSING INC5 citations73
US9042901B2May 26, 2015
Dynamic small cell provisioning and frequency tuning
VERIZON PATENT & LICENSING INC4 citations73
ALTERA CORP
5 patentsUS5241224AAug 31, 1993
High-density erasable programmable logic device architecture using multiplexer interconnections
ALTERA CORP178 citations99
US5384499AJan 24, 1995
High-density erasable programmable logic device architecture using multiplexer interconnections
ALTERA CORP49 citations96
US5097208AMar 17, 1992
Apparatus and method for measuring gate delays in integrated circuit wafers
ALTERA CORP26 citations93
US5268598ADec 7, 1993
High-density erasable programmable logic device architecture using multiplexer interconnections
ALTERA CORP33 citations92
US5091661AFeb 25, 1992
Methods and apparatus for reducing coupling noise in programmable logic devices
ALTERA CORP11 citations74
BAO DEREK HONGWEI
3 patentsAGUIRRE SERGIO
2 patentsKOTECHA LALIT R
2 patentsSAGE N RES INC
2 patentsMACIAS JOHN F
2 patentsADVANCED MICRO DEVICES INC
1 patentCHIANG DAVID
1 patentRAWAT VIKRAM K
1 patentVERIZON PATENT AND LICENSING
1 patentMCC ASSOC
1 patentTJIO LEE
1 patentCELLCO PARTNERSHIP DBA VERIZON
1 patentShowing the top 50 of 121 patents by PatentIndex Score.