Inventor

DO BYUNG TAI

SG227 patents

⚠️ This page may combine multiple inventors who share the name “DO BYUNG TAI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DO BYUNG TAI

STATS CHIPPAC LTD

Semiconductor device and method of forming conductive TSV with insulating annular ring

Method and apparatus for thermally enhanced semiconductor package

Integrated circuit package system for electromagnetic isolation

Semiconductor device having electrical devices mounted to IPD structure and method for shielding electromagnetic interference

Semiconductor device and method of forming through vias with reflowed conductive material

Semiconductor device and method of forming double-sided through vias in saw streets

Semiconductor device and method of forming shielding along a profile disposed in peripheral region around the device

Package-on-package using through-hole via die on saw streets

Semiconductor device and method of forming embedded passive circuit elements interconnected to through hole vias

Semiconductor package having through-hole via on saw streets formed with partial saw

Air pocket resistant semiconductor package system

Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect

Integrated circuit packaging system with film encapsulation and method of manufacture thereof

Semiconductor device and method of forming a shielding layer between stacked semiconductor die

Semiconductor package with penetrable encapsulant joining semiconductor die and method thereof

Integrated circuit packaging system with stacked die and method of manufacture thereof

Integrated circuit package-in-package system with wire-in-film encapsulant

Semiconductor die with through-hole via on saw streets and through-hole via in active area of die

Semiconductor device and method of forming shielding along a profile disposed in peripheral region around the device

Semiconductor device and method of forming embedded passive circuit elements interconnected to through hole vias

Semiconductor wafer having through-hole vias on saw streets with backside redistribution layer

Semiconductor device and method of forming conductive pillars in recessed region of peripheral area around the device for electrical interconnection to other devices

Triple tier package on package system

Same size die stacked package having through-hole vias formed in organic material

Semiconductor device and method of forming recessed conductive vias in saw streets

Semiconductor device and method of forming stepped-down RDL and recessed THV in peripheral region of the device

Through-hole via on saw streets

Integrated circuit packaging system having through silicon vias with partial depth metal fill regions and method of manufacture thereof

Integrated circuit solder bumping system

Air pocket resistant semiconductor package

PAGAILA REZA A

Semiconductor device and method of forming stepped interconnect layer for stacked semiconductor die

Semiconductor device including pre-fabricated shielding frame disposed over semiconductor die

Semiconductor device and method of providing Z-interconnect conductive pillars with inner polymer core

Semiconductor device and method of forming stepped interconnect layer for stacked semiconductor die

Semiconductor device and method of forming vertical interconnect structure using stud bumps

Semiconductor device and method of providing z-interconnect conductive pillars with inner polymer core

Through hole vias at saw streets including protrusions or recesses for interconnection

Making a semiconductor device having conductive through organic vias

Semiconductor device and method of shielding semiconductor die from inter-device interference

Semiconductor device and method of forming through vias with reflowed conductive material

Semiconductor device and method of embedding thermally conductive layer in interconnect structure for heat dissipation

Semiconductor device and method of stacking die on leadframe electrically connected by conductive pillars

Semiconductor device and method of mounting pre-fabricated shielding frame over semiconductor die

DO BYUNG TAI

Integrated circuit packaging system with interconnect and method of manufacture thereof

Semiconductor wafer having through-hole vias on saw streets with backside redistribution layer

Integrated circuit package system for shielding electromagnetic interference

Semiconductor device and method of forming bond wires and stud bumps in recessed region of peripheral area around the device for electrical interconnection to other devices

CHUA LINDA PEI EE

Semiconductor device and method of forming interconnect structure and mounting semiconductor die in recessed encapsulant

PAGAILA REZA ARGENTY

Exposed interconnect for a package on package system

ST ASSEMBLY TEST SERVICES LTD

Thermally enhanced stacked die package and fabrication method