Inventor

TESSARIOL PAOLO

IT80 patents

⚠️ This page may combine multiple inventors who share the name “TESSARIOL PAOLO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TESSARIOL PAOLO

MICRON TECHNOLOGY INC

Conductive structures, systems and devices including conductive structures and related methods

Methods of forming microelectronic devices, and related microelectronic devices and electronic systems

Methods of forming an array of elevationally-extending strings of memory cells comprising a programmable charge storage transistor and arrays of elevationally-extending strings of memory cells comprising a programmable charge storage transistor

Memory arrays and methods used in forming a memory array comprising strings of memory cells

Microelectronic devices, memory devices, and electronic systems

Methods of forming microelectronic devices and memory devices, and related microelectronic devices, memory devices, and electronic systems

Methods of forming conductive structures including stair step or tiered structures having conductive portions

Methods of forming an array of elevationally-extending strings of memory cells comprising a programmable charge storage transistor and arrays of elevationally-extending strings of memory cells comprising a programmable charge storage transistor

Forming array contacts in semiconductor memories

Forming array contacts in semiconductor memories

Vertical 3D memory device and method for manufacturing the same

Memory devices including stair step or tiered structures and related methods

Memory arrays and methods used in forming a memory array

Integrated structures, capacitors and methods of forming capacitors

Apparatus and methods including a bipolar junction transistor coupled to a string of memory cells

Methods used in forming a memory array comprising strings of memory cells

Forming array contacts in semiconductor memories

Apparatuses and methods comprising a channel region having different minority carrier lifetimes

Integrated assemblies having vertically-spaced channel material segments, and methods of forming integrated assemblies

Device, a method used in forming a circuit structure, a method used in forming an array of elevationally-extending transistors and a circuit structure adjacent thereto

Erasing memory

Integrated assemblies and methods of forming integrated assemblies

Capacitors having vertical contacts extending through conductive tiers

Microelectronic devices with different staircased stadiums having consistent multi-tier step riser height, and related systems and methods

Memory arrays and methods used in forming a memory array comprising strings of memory cells

Devices including stair step structures, and related memory devices and electronic systems

Memory arrays and methods used in forming a memory array comprising strings of memory cells

Vertical 3D memory device and method for manufacturing the same

Integrated structures, capacitors and methods of forming capacitors

Methods of forming microelectronic devices, and related microelectronic devices and electronic systems

Integrated assemblies and methods of forming integrated assemblies

Capacitors having vertical contacts extending through conductive tiers

Methods of forming memory devices including stair step structures

Dielectric extensions in stacked memory arrays

Microelectronic devices with symmetrically distributed staircase stadiums and related systems and methods

Integrated structures, capacitors and methods of forming capacitors

Method of making a floating gate non-volatile MOS semiconductor memory device with improved capacitive coupling

Microelectronic devices, memory devices, and electronic systems, and methods of forming the same

Sub-block definition in a memory device using segmented source plates

Microelectronic devices including staircase structures, and related memory devices, electronic systems, and methods

Memory array structures and methods of forming memory array structures

Memory device including different dielectric structures between blocks

Memory array having air gaps

Integrated circuitry, memory circuitry comprising strings of memory cells, and method of forming integrated circuitry

TESSARIOL PAOLO

Apparatuses and methods comprising a channel region having different minority carrier lifetimes

Apparatus and methods including a bipolar junction transistor coupled to a string of memory cells

LODESTAR LICENSING GROUP LLC

Integrated structures, capacitors and methods of forming capacitors

3D NAND memory device devices and related electronic systems

MEOTTO UMBERTO M

Method of fabricating a charge trap NAND flash memory

SOMASCHINI ROBERTO

Forming array contacts in semiconductor memories